Data allocation into multiple memories for concurrent access
AssigneeMotorola, Inc.
InventorMauricio Breternitz, Jr.
Life of this patent
Estimating the term…
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AssigneeMotorola, Inc.
InventorMauricio Breternitz, Jr.
Estimating the term…
Data is allocated into multiple memories with selective variable replication for maximizing performance by minimizing concurrent memory access conflicts. Requirements for concurrent access are summarized in a transformed concurrent access graph. Graph vertices are merged to disallow variable replication. All potential graph merges that cause a reduction in machine cycle time are identified. The ratios of saved cycles/memory cost in bytes are then computed for each potential merge. The potential merges are then sorted by their saved cycles/bytes ratio. Finally, potential merges resulting in replicated variables are selected based on their cycles/bytes ratios until a predefined memory target size is achieved. Either graph coloring or clique partitioning can be used to allocate variables into memory banks.
A method of allocating data over a plurality of memories for concurrent access, said method comprising the steps of:
A compiler executable on a central processing unit (CPU) and stored in a Computer Software Storage Medium that allocates data over a plurality of memories for concurrent access, said compiler comprising:
A system for allocating data over a plurality of memories for concurrent access, said system comprising:
A method of allocating data over a plurality of memories for concurrent access, said method comprising the steps of:
A method of allocating data over a plurality of memories for concurrent access, said method comprising the steps of:
A method of allocating data over a plurality of memories for concurrent access, said method comprising the steps of:
A method of allocating data over a plurality of memories for concurrent access, said method comprising the steps of:
A processor comprising:
Dependencies are inferred from the claim text.