Reflection reducing directional coupler
AssigneeTRW Inc.
InventorsMark Kintis, May M. Tan
Life of this patent
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Abstract
A reflection reducing directional coupler provides an output signal from a coupled signal while reducing the effect of an input signal. The directional coupler provides circuitry to divide, phase delay and vectorially add signals to provide coherent output and coupled signals and reduce reflected signals. The directional coupler also provides the capability to input a calibration signal into a system while mininimizing the effect of the calibration signal on the output signal.
Claims25
A directional coupler for providing an output signal and a coupled signal from an input signal while reducing the effects of a reflected signal comprising:
- means for inputting an input signal into an input port of said directional coupler;
- means to divide said input signal into a first and a second intermediate signal;
- means to phase delay said second intermediate signal to generate a first delayed signal;
- means to divide said first intermediate signal into a third and a fourth intermediate signal;
- means to divide said first delayed signal into a second and a third delayed signal;
- means to phase delay said fourth intermediate signal to generate a fourth delayed signal;
- means to combine and vectorially add said third delayed signal and said fourth delayed signal into a coupled signal;
- means to output said coupled signal at a coupled port of said directional coupler;
- means to phase delay said third intermediate signal to generate a fifth delayed signal;
- means to combine and vectorially add said second delayed signal and said fifth delayed signal into an output signal;
- means to output said output signal at an output port of said directional coupler, an impedance match between said output port and an external load attached to said output port determining an amplitude of a first reflected signal;
- means to divide said first reflected signal into a second and a third reflected signal;
- means to phase delay said second reflected signal to generate a sixth delayed signal;
- means to divide said sixth delayed signal into a seventh delayed signal and an eighth delayed signal;
- means to divide said third reflected signal into a fourth reflected signal and a fifth reflected signal;
- means to phase delay said seventh delayed signal to generate a ninth delayed signal;
- and,
- means to combine and vectorially add said fourth reflected and ninth delayed signals.
A directional coupler for providing an output signal and a coupled signal from an input signal while reducing the effects of a reflected signal comprising:
- a first electrical member including an input port, a second port, and a third port, said input port being adapted for receiving an input signal, said first electrical member being configured to divide said input signal into a first intermediate signal and a second intermediate signal and to phase delay said first intermediate signal to generate a first delayed signal, said first intermediate signal provided at said second port of said first electrical member and said first delayed signal provided at said third port of said first electrical member;
- a second electrical member including a fourth port, a fifth port, and a coupled port, said fourth port being electrically connected to said second port of said first electrical member, said fifth port being electrically connected to said third port of said first electrical member;
- a third electrical member including a seventh port, an eight port, and an output port, said seventh port being electrically connected to said second port of said first electrical member said eighth port being electrically connected to said third port of said first electrical member, said electrical connections of said second and third electrical members to said first electrical member dividing said first intermediate signal into a third intermediate signal and a fourth intermediate signal, and, dividing said first delayed signal into a second delayed signal and a third delayed signal;
- said fourth port of said second electrical member being adapted to receive said fourth intermediate signal and said fifth port of said second electrical member being adapted to receive said third delayed signal, said second electrical member being configured to phase delay said fourth intermediate signal to generate a fourth delayed signal, said second electrical member configured to combine and vectorially add said third delayed signal and said fourth delayed signals into a coupled signal, said coupled signal provided at said coupled port of said second electrical member;
- said seventh port of said third electrical member being adapted to receive said third intermediate signal, said eighth port being adapted to receive said second delayed signal, said third electrical member configured to phase delay said third intermediate signal to generate a fifth delayed signal, said third electrical member configured to combine and vectorially add said second delayed and fifth delayed signals and provide an output signal, said output signal provided at said output port of said third electrical member an impedance match between said output port and an external load attached to said output port determining an amplitude of a first reflected signal;
- said third electrical member configured to divide said first reflected signal into a second and a third reflected signal, said third electrical member configured to phase delay to said second reflected signal to generate a sixth delayed signal, said third reflected signal provided at said eighth port of said third electrical member, said sixth delayed signal provided at said seventh port of said third electrical member;
- said electrical connection of said second and third electrical members to said first electrical member dividing said sixth delayed signal into a seventh delayed signal and an eighth delayed signal, and, dividing said third reflected signal into a fourth reflected signal and a fifth reflected signal;
- and,
- said fourth port of said second electrical member adapted to receive said seventh delayed signal, said fifth port of said second electrical member adapted to receive said fourth reflected signal, said second electrical member configured to phase delay said seventh delayed signal to generate a ninth delayed signal, said second electrical member configured to combine and vectorially add said fourth reflected and said seventh delayed signals.
Dependencies are inferred from the claim text.