Back to results
US 5,966,044 AGranted
Pull-up circuit and semiconductor device using the same
AssigneeFujitsu Limited
InventorNaoaki Naka
Life of this patent
Estimating the term…
Abstract
A pull-up circuit includes a pull-up transistor of a P-channel type having a drain coupled to a bus via a terminal, a source, a gate and a back gate, and a control circuit controlling the pull-up transistor so that no currents flow in a first current path formed from the drain to the back gate and a second path formed from the drain to the source.
Claims18
A pull-up circuit comprising:
- a pull-up transistor of a P-channel type having a drain coupled to a bus via a terminal, a source, a gate and a back gate;
- and
- a control circuit controlling the pull-up transistor so that no current flow in a first current path formed from the drain to the back gate and no current flows in a second path formed from the drain to the source only when a drain potential of the pull-up transistor is higher than a source potential thereof.
A pull-up circuit comprising:
- a pull-up transistor of a P-channel type having a drain coupled to a bus via a terminal, a source having a first power supply potential V1 from a first power supply line, a gate and a back gate;
- a first power supply circuit which defines a well potential approximately equal to a higher one of the first power supply potential and a potential Vx applied to the drain from the bus via the terminal and sets the back gate to the well potential;
- and
- a second power supply circuit which defines a gate potential so the gate potential is approximately equal to the potential Vx when the potential Vx exceeds the first power supply potential and is approximately equal to a second power supply potential V2 that is supplied from a second power supply line and is lower than the first power supply potential,
- the gate being set to the gate potential defined by the second power supply circuit.
2 more elements
A semiconductor device comprising:
- a buffer coupled to a terminal to which a bus is connected;
- and
- a pull-up circuit,
- said pull-up circuit comprising:
- a pull-up transistor of a P-channel type having a drain coupled to the bus via the terminal, a source, a gate and a back gate;
- and
- a control circuit controlling the pull-up transistor so that no current flows in a first current path formed from the drain to the back gate and no current flows in a second path formed from the drain to the source only when a drain potential of the pull-up transistor is higher than a source potential thereof.
4 more elements
A semiconductor device comprising:
- a buffer coupled to a terminal to which a bus is connected;
- and
- a pull-up circuit,
- said pull-up circuit comprising:
- a pull-up transistor of a P-channel type having a drain coupled to the bus via the terminal, a source having a first power supply potential V1 from a first power supply line, a gate and a back gate;
- a first power supply circuit which defines a well potential approximately equal to a higher one of the first power supply potential and a potential Vx applied to the drain from the bus via the terminal and sets the back gate to the well potential;
- and
- a second power supply circuit which defines a gate potential so the gate potential is approximately equal to the potential Vx when the potential Vx exceeds the first power supply potential and is approximately equal to a second power supply potential V2 that is supplied from a second power supply line and is lower than the first power supply potential,
- the gate being set to the gate potential defined by the second power supply circuit.
6 more elements
A system comprising:
- a circuit board;
- a plurality of semiconductor devices mounted on the circuit board and connected together via a bus,
- at least one of the plurality of semiconductor devices including a pull-up circuit,
- said pull-up circuit comprising:
- a pull-up transistor of a P-channel type having a drain coupled to the bus via the terminal, a source, a gate and a back gate;
- and
- a control circuit controlling the pull-up transistor so that no current flows in a first current path formed from the drain to the back gate and no current flows in a second path formed from the drain to the source only when a drain potential of the pull-up transistor is higher than a source potential thereof.
4 more elements
A system comprising:
- a circuit board;
- a plurality of semiconductor devices mounted on the circuit board and connected together via a bus,
- at least one of the plurality of semiconductor devices including a pull-up circuit,
- said pull-up circuit comprising:
- a pull-up transistor of a P-channel type having a drain coupled to the bus via the terminal, a source having a first power supply potential V1 from a first power supply line, a gate and a back gate;
- a first power supply circuit which defines a well potential approximately equal to a higher one of the first power supply potential and a potential Vx applied to the drain from the bus via the terminal and sets the back gate to the well potential;
- and
- a second power supply circuit which defines a gate potential so the gate potential is approximately equal to the potential Vx when the potential Vx exceeds the first power supply potential and is approximately equal to a second power supply potential V2 that is supplied from a second power supply line and is lower than the first power supply potential,
- the gate being set to the gate potential defined by the second power supply circuit.
6 more elements
Dependencies are inferred from the claim text.