Multi-bit exclusive or
AssigneeMotorola, Inc.
InventorsMoshe Tarrab, Eytan Engel, Natan Baron, Dan Kuzmin
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AssigneeMotorola, Inc.
InventorsMoshe Tarrab, Eytan Engel, Natan Baron, Dan Kuzmin
Estimating the term…
The present invention relates to multi-bit exclusive-or (XOR) gates (60), including those where N parallel input bits (36, 38) are XORed with one data input bit (52). A modular approach is made using only one basic cell (30) for various implementations with different propagation delays. An N-bit XOR comprises basic cells (30) of adjacent first and second XOR gates (32, 34). Each first XOR gate (32) processes as input two of said N primary input bits (36, 38) and each second XOR gate (34) processes as input bits output bits of first or second XOR gates (32, 34) or the input data bit (52). This structure makes it possible to create an array of identical basic cells which is very suitable for VLSI implementation. There are few lines of connections between the different cells in the cell array which leads to substantial reduction in propagation delay without adding substantial wiring or layout complexity.
An apparatus having therein an N-bit XOR using k serial stages wherein each serial stage comprises N/(2 k) basic cells of first and second XORs, wherein last XORs of all stages are arranged in series, and other XORs of each of said k stages form a logical tree structure feeding into the last XOR of each stage.
An apparatus for performing an N-bit XOR with an input data bit, comprising two basic cells each having first and second XOR gates, wherein each first XOR gate receives as input bits two of N primary input bits and one of the second XOR gates receives input bits from outputs of the first XOR gates of the two basic cells and provides a first input bit to the other second XOR gate, where the other second XOR gate receives the input data bit.
A method for performing an N-bit XOR with one data bit comprising the steps of:
Dependencies are inferred from the claim text.