System and method to control microprocessor startup to reduce power supply bulk capacitance needs
AssigneeAdvanced Micro Devices, Inc.
InventorAllen Thor
Life of this patent
Estimating the term…
Abstract
A system for controlling a clock rate of a microprocessor which includes a core clock operatively coupled to the processor, the core clock providing the microprocessor with a core clock signal for clocking the processor. A power supply operatively coupled to the microprocessor provides power to the processor. An intelligent clock generating system provides the core clock with at least one clock signal of a plurality of clock signals to be used as the core clock signal, wherein the plurality of clock signals includes a master clock signal and at least one ramped clock signal.
Claims26
A system for controlling an operating frequency of a microprocessor, comprising:
- a core clock operatively coupled to the microprocessor, the core clock providing the microprocessor with a core clock signal for clocking the processor, wherein the core clock signal increases in frequency over time so as to increase the operating frequency of the microprocessor over time.
A system for controlling a clock rate of a microprocessor, comprising:
- a core clock operatively coupled to the microprocessor, the core clock providing the microprocessor with a core clock signal for clocking the microprocessor;
- a power supply operatively coupled to the microprocessor, the power supply providing power to the microprocessor;
- and
- an intelligent clock generating system for providing the core clock with at least one clock signal of a plurality of clock signals to be used as the core clock signal, wherein the plurality of clock signals includes a master clock signal and at least one ramped clock signal.
A method for regulating microprocessor power requirements, comprising the steps of:
- using a core clock to provide the microprocessor with a core clock signal for clocking the processor;
- using a power supply to provide power to the processor;
- and
- using an intelligent clock generating system to provide the core clock with at least one clock signal of a plurality of clock signals to be used as the core clock signal, wherein the plurality of clock signals includes a master clock signal and at least one ramped clock signal.
A system for controlling a clock rate of a processor, comprising:
- a core clock operatively coupled to the processor, the core clock providing the microprocessor with a core clock signal for clocking the processor;
- a power supply operatively coupled to the processor, the power supply providing power to the processor;
- and
- an intelligent clock generating system for providing the core clock with at least one clock signal of a plurality of clock signals to be used as the core clock signal, wherein the plurality of clock signals includes a master clock signal and at least one ramped clock signal, the intelligent clock generating system including:
- a signal stabilizer for stabilizing the master clock signal;
- a clock select multiplexer adapted to provide the core clock with one of the master clock signal or the at least one ramped clock signal.
Dependencies are inferred from the claim text.