Interface controller including hardware mechanism to handle PS/2 interface

An interface circuit that interfaces a host processor to a serial device for input/output functions and that also handles host commands including one of a GA20 and RESET-CPU host commands from a host processor, the interface circuit comprising:

• host interface circuitry via which the host commands are received from the host processor;
• serial device interface circuitry including:
• storage circuitry that holds a predetermined plurality of data bits;
• and
• state machine circuitry that controls the storage circuitry for serial bit-level communication of the plurality of data bits between the storage circuitry and the serial device;
• a command processor that processes the host commands received from the host processor via the host interface circuitry, including the one of the GA20 and RESET-CPU host commands, and that selectively asserts one of a GA20 or RESET-CPU signal, respectively, to the host processor, based on the processed received host command, wherein the serial device interface circuitry operates without being interrupted by the command processor.