Method and apparatus for tracking erase cycles utilizing active and inactive wear bar blocks having first and second count fields
AssigneeIntel Corporation
InventorDerek L. Davis
Life of this patent
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AssigneeIntel Corporation
InventorDerek L. Davis
Estimating the term…
A method and apparatus for keeping track of erase cycles performed on a plurality of storage blocks in a flash memory device. The flash memory device comprises at least two wear-bar blocks (active and inactive) for use in storing a plurality of erase count values representing the erase cycles performed on the plurality of storage blocks. Each wear-bar block includes a plurality of wear-bar storage elements corresponding to each of the plurality of storage blocks. Each wear-bar storage element includes a first count field and a second count field which collectively contain an erase count value. The second count field may be updated by changing from an initial state (SET, e.g.) to a final state (CLEAR, e,g.) without erasure of its corresponding wear-bar block. The first count field is updated in a normal binary sequence each time the second count field reaches a maximum count (e.g., all bits are changed from SET to CLEAR). When that occurs, the contents of the active wear-bar block are transferred to the inactive wear-bar block, the active wear-block is completely erased becoming the inactive wear-bar block, while the previously inactive wear-bar block becomes the active wear-bar block. In this manner, the wear bar blocks will not be worn out before the storage blocks and can be used as a reliable indicator of the number of erase cycles for the storage blocks.
A method for keeping track of erase cycles performed on a plurality of storage blocks in a flash memory device, the method comprising:
A flash memory device comprising:
A system comprising:
A system comprising:
A method for monitoring of erase cycles performed on a non-volatile memory having a plurality of storage blocks, the method comprising:
Dependencies are inferred from the claim text.