Method for silicon island formation
AssigneeKabushiki Kaisha Toshiba
InventorMasakatsu Tsuchiaki
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AssigneeKabushiki Kaisha Toshiba
InventorMasakatsu Tsuchiaki
Estimating the term…
A method is disclosed of manufacturing improved device structures which include a device structure having STI and a thin foot charge drain beneath the device area on an inexpensive bulk silicon substrate. The structures retain high speed operation of SOI devices without any adverse effects of charge build-up and floating effects as observed in conventional SOI devices, and, furthermore, are constructed without any extra process steps added to the conventional STI technology except for an isotropic etching step. The invention also contemplates construction of multi-level electronic circuit. In various embodiments, the invention includes steps of forming a photoresist pattern over a semiconductor substrate to designate a plurality of islands, anisotropic etching the substrate to form plurality of designate islands which develops thin passivation layer on the sidewall, performing successively an isotropic etching on the resulting structure to create a thin foot region under each of the plurality of the islands with the help of the passivation layer, and forming a thin thermal oxide layer to improve the interface quality between each thin foot region and the insulator. Additional layers of silicon islands may be formed on the resulting structure.
A method of manufacturing a semiconductor device, comprising the steps of:
A method of manufacturing a silicon-on-insulator device, comprising the steps of:
A method of manufacturing a semiconductor device, comprising the steps of:
Dependencies are inferred from the claim text.