Dielectrically-isolated integrated circuit
AssigneeKabushiki Kaisha Toshiba
InventorsToshimitu Katoh, Yoshiaki Aizawa, Hisaya Okumura
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AssigneeKabushiki Kaisha Toshiba
InventorsToshimitu Katoh, Yoshiaki Aizawa, Hisaya Okumura
Estimating the term…
In a semiconductor integrated circuit consisting of a plurality of semiconductor chips each having a plurality of islands, two or more bonding wires each having different potential are connected to bonding pads formed on the surface of semiconductor chips. The islands are isolated by a dielectric isolation region comprising polysilicon film and isolation film formed in an isolation groove. The polysilicon film is exposed at a dicing line region around the semiconductor chip and a surface of the polysilicon film is made highly resistive. If two or more bonding wires come into contact with the polysilicon film exposed at a peripheral region of the semiconductor chip to cause short circuit, parasitic conductance does not occur between two or more bonding wires because the peripheral region of the semiconductor chip has high resistivity, whereby variation in characteristics of the semiconductor integrated circuit can be suppressed.
A switching apparatus, comprising:
An integrated circuit having a dielectric isolation region consisting essentially of an isolation film formed on an inner wall of an isolation groove disposed in a semiconductor chip and a polysilicon film formed on the isolation film to bury the isolation groove,
A switching apparatus, comprising:
An integrated circuit comprising a first semiconductor chip and a second semiconductor chip, each chip having a dielectric isolation region consisting essentially of an isolation film formed on an inner wall of an isolation groove disposed in each chip and a polysilicon film formed on the isolation film to bury the isolation groove;
A semiconductor chip comprising:
Dependencies are inferred from the claim text.