ATM switch device constructed from Banyan network and its installation method

A switch apparatus switching asynchronous transfer mode data cells and constructed from Banyan networks, the apparatus comprising:

• a plurality of front-end switches having output ports;
• a first plurality of unit switches being placed at a front part of the apparatus, said first plurality of unit switches being partitioned by said front-end switches, and said first plurality of unit switches switching asynchronous transfer mode data cells;
• a plurality of rear-end switches having input ports;
• and
• a second plurality of unit switches being placed at a rear part of the apparatus, said second plurality of unit switches being partitioned by said rear-end switches, and said second plurality of unit switches switching asynchronous transfer mode data cells, the output ports of said front-end switches being connected to the input ports of said rear-end switches.

An asynchronous transfer mode switch apparatus in a three-dimensional structure constructed from Banyan networks, the apparatus comprising:

• a backboard connector having a front end and a rear end, and having electrically conductive terminals;
• a first plurality of circuit boards placed at the front end of said backboard connector, said first plurality of circuit boards being arranged horizontally;
• a second plurality of circuit boards placed at the rear end of said backboard connector, said second plurality of circuit boards being arranged vertically;
• output links connected to said backboard connector;
• input links connected to said backboard connector;
• and
• a plurality of unit switches being interconnected so as to maintain characteristics of Banyan networks, said plurality of unit switches being assembled to one circuit board and switching asynchronous transfer mode data cells.

A method of fabricating an asynchronous transfer mode switch apparatus constructed from Banyan networks using unit switches, comprising the steps of:

• placing a first plurality of unit switches at a front part of the apparatus, said first plurality of unit switches switching asynchronous transfer mode data cells;
• partitioning said first plurality of unit switches by front-end switches;
• placing a second plurality of unit switches at a rear part of the apparatus, said second plurality of unit switches switching asynchronous transfer mode data cells;
• partitioning said second plurality of unit switches by rear-end switches;
• horizontally arranging said front-end switches;
• vertically arranging said rear-end switches;
• and
• connecting output ports of said front-end switches to input ports of said rear-end switches.

A three-dimensional switch apparatus switching asynchronous transfer mode data cells and being constructed from Banyan networks, the apparatus comprising:

• a first plurality of boards being arranged horizontally, said first plurality of boards comprising:
• a top board having a top face, a bottom face, a front edge, a rear edge, a left edge, and a right edge;
• a bottom board having a top face, a bottom face, a front edge, a rear edge, a left edge, and a right edge;
• and
• a plurality of horizontal center boards disposed between said top board and said bottom board, each horizontal center board having a top face, a bottom face, a front edge, a rear edge, a left edge, and a right edge;
• a second plurality of boards being arranged vertically, said second plurality of boards comprising:
• a left board having a top edge, a bottom edge, a front edge, a rear edge, a left face, and a right face, said front edge of said left board being adjacent to said rear edges of said top board, said bottom board, and said plurality of horizontal center boards;
• a right board having a top edge, a bottom edge, a front edge, a rear edge, a left face, and a right face, said front edge of said right board being adjacent to said rear edges of said top board, said bottom board, and said plurality of horizontal center boards;
• and
• a plurality of vertical center boards disposed between said left board and said right board, each vertical center board having a top edge, a bottom edge, a front edge, a rear edge, a left face, and a right face;
• a first plurality of unit switches being coupled to said top board, switching asynchronous transfer mode data cells, and having a first plurality of input and output ports;
• a first plurality of rear-edge switches being selected from among said first plurality of unit switches and being adjacent to said rear edge of said top board;
• a second plurality of unit switches being coupled to said bottom board, switching asynchronous transfer mode data cells, and having a second plurality of input and output ports;
• a second plurality of rear-edge switches being selected from among said second plurality of unit switches and being adjacent to said rear edge of said bottom board;
• a third plurality of unit switches being coupled to said left board, switching asynchronous transfer mode data cells, and having a third plurality of input and output ports;
• a first plurality of front-edge switches being selected from among said third plurality of unit switches and being adjacent to said front edge of said left board;
• a fourth plurality of unit switches being coupled to said right board, switching asynchronous transfer mode data cells, and having a fourth plurality of input and output ports;
• a second plurality of front-edge switches being selected from among said fourth plurality of unit switches and being adjacent to said front edge of said right board;
• a first rear-edge switch of said first plurality of rear-edge switches being adjacent to said left edge of said top board;
• a second rear-edge switch of said first plurality of rear-edge switches being adjacent to said right edge of said top board;
• a first rear-edge switch of said second plurality of rear-edge switches being adjacent to said left edge of said bottom board;
• a second rear-edge switch of said second plurality of rear-edge switches being adjacent to said right edge of said bottom board;
• a first front-edge switch of said first plurality of front-edge switches being adjacent to said top edge of said left board, a first input port of said first front-edge switch of said first plurality of front-edge switches being coupled to and receiving asynchronous transfer mode data cells from a first output port of said first rear-edge switch of said first plurality of rear-edge switches, said first input port being selected from among said third plurality of input ports, and said first output port being selected from among said first plurality of output ports;
• a second front-edge switch of said first plurality of front-edge switches being adjacent to said bottom edge of said left board, a second input port of said second front-edge switch of said first plurality of front-edge switches being coupled to and receiving asynchronous transfer mode data cells from a second output port of said first rear-edge switch of said second plurality of rear-edge switches, said second input port being selected from among said third plurality of input ports, and said second output port being selected from among said second plurality of output ports;
• a first front-edge switch of said second plurality of front-edge switches being adjacent to said top edge of said right board, a third input port of said first front-edge switch of said second plurality of front-edge switches being coupled to and receiving asynchronous transfer mode data cells from a third output port of said second rear-edge switch of said first plurality of rear-edge switches, said third input port being selected from among said fourth plurality of input ports, and said third output port being selected from among said first plurality of output ports;
• and
• a second front-edge switch of said second plurality of front-edge switches being adjacent to said bottom edge of said right board, a fourth input port of said first front-edge switch of said second plurality of front-edge switches being coupled to and receiving asynchronous transfer mode data cells from a fourth output port of said second rear-edge switch of said second plurality of rear-edge switches, said fourth input port being selected from among said fourth plurality of input ports, and said fourth output port being selected from among said second plurality of output ports.