Time measurement device

A time measurement device for measuring a time width of a pulsed input signal based on a clock signal which successively rises and falls, comprising:

• first gate means for generating a gate signal having a leading edge and a trailing edge, and an interval according to a counted value of pulses of said input signal;
• first clock outputting means for outputting the clock signal at a first time interval shorter than the interval of the gate signal in a vicinity of the leading edge of the gate signal;
• first holding means for holding and outputting the gate signal at a time of falling of the clock signal;
• second holding means for holding and outputting the gate signal at a time of rising of the clock signal;
• third holding means for holding and outputting an output state of said first holding means at a timing of a leading edge of the output of said second holding means;
• second clock outputting means for outputting the clock signal at a second time interval shorter than the interval of the gate signal in a vicinity of the trailing edge of the gate signal;
• fourth holding means for holding and outputting the gate signal at a time of falling of the clock signal;
• fifth holding means for holding and outputting the gate signal at a time of rising of the clock signal;
• sixth holding means for holding and outputting an output state of said fourth holding means at a timing of a leading edge of the output of said fifth holding means;
• second gate means for passing the clock signal in a time determined by two output signals of said first, second, fourth and fifth holding means;
• and
• counter means for counting the clock signal output from said second gate means.

A time measurement method for measuring a time width of a pulsed input signal based on a clock signal which successively rises and falls, comprising the steps of:

• generating a gate signal according to a counted value of pulses of the input signal;
• holding the gate signal from a time of falling of the clock signal, and outputting at least one first signal, the first signal having a leading edge and a trailing edge, and a width;
• holding the gate signal from a time of rising of the clock signal, and outputting a second signal, the second signal having a width;
• holding an output state of the second signal at a timing of the leading edge of the first signal, and outputting a third signal;
• holding an output state of the second signal at a timing of the trailing edge of the first signal, and outputting a fourth signal;
• passing the clock signal according to one of the widths of the first and second signals;
• and
• counting the passed clock signal.

A time measurement device for measuring a time width of a pulsed input signal based on a clock signal, comprising:

• first gate means for generating a gate signal having a width according to a counted value of pulses of the input signal;
• first holding means for holding the gate signal at a timing of a first type of change of the clock signal, the first holding means producing at least one output which has a leading edge, a trailing edge and a width;
• second holding means for holding and outputting the gate signal at a timing of a second type of change of the clock signal, the second holding means output having a width;
• second gate means for passing the clock signal according to one of the widths of the output signals of said first and second holding means;
• third holding means for holding and outputting an output state of said second holding means at a timing of the leading edge of the output of said first holding means;
• fourth holding means for holding and outputting an output state of said second holding means at a timing of the trailing edge of the output of said first holding means;
• and
• counter means for counting a clock signal output from said second gate means.

A time measurement method for measuring a time width of a pulsed input signal based on a clock signal, comprising the steps of:

• generating a gate signal according to a counted value of pulses of the input signal;
• holding the gate signal from a timing of a first type of change of the clock signal, and outputting a first signal having a leading edge, a trailing edge and a width;
• holding the gate signal from a timing of a second type of change of the clock signal, and outputting a second signal having a width;
• holding an output state of the second signal at a timing of the leading edge of the first signal, and outputting a third signal;
• holding an output state of the second signal at a timing of the trailing edge of the first signal, and outputting a fourth signal;
• passing the clock signal according to one of the widths of the first signal and the second signal;
• and
• counting the passed clock signal.