Write enabling circuitry for a semiconductor memory
AssigneeCypress Semiconductor Corporation
InventorsShiva P. Gowni, Sudhir S. Moharir, Sanjay Sancheti
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Abstract
A write control circuit for a semiconductor memory device includes a conventional write path responsive to a control input (e.g., an external write enable signal) to control the beginning of a write operation for a write driver, whilst a separate dedicated write disable path, responsive to the same control input, controls the end of the write operation for the write driver. The invention separates the end of write from the beginning of write by introducing a fast dedicated path designed primarily for ending the write. This dedicated path contains dedicated logic to generate an end of write signal at the disabling edge of the control input to disable the write driver quickly before a new memory cell is selected.
Claims10
A write control circuit, comprising:
- a write enable path comprising a first logic circuit responsive to a first logic transition of a control input to generate a first output signal for controlling the beginning of a write operation;
- and,
- a separate write disable path comprising a second logic circuit responsive to a second logic transition of said control input to generate a second output signal for controlling the end of said write operation.
A method of writing data into a semiconductor memory device comprising the steps of:
- generating a first output signal for controlling the beginning of a write operation in response to a first logic transition of a control signal;
- and
- generating a second output signal for controlling an end of write operation in response to a second logic transition of the control signal.
Dependencies are inferred from the claim text.