Method of erasing a flash memory cell and device for erasing the same
AssigneeHyundai Electronics Industries Co., Ltd.
InventorsJoo Weon Park, Hyung Rae Park
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Abstract
The present invention disclosed a method of erasing a flash memory comprising the step of applying a drain bias voltage for erasing to any one of said sectors; applying a drain bias voltage for erasing to a next sector before said sector is completely erased, whereby the sectors are erased sequentially.
Claims5
A method of erasing a readable, writable and erasable flash memory cell, comprising the steps of;
- applying a drain bias voltage for erasing to a first sector of a memory cell array divided into a plurality of sectors;
- applying a drain bias voltage for erasing to a second sector before said first sector is completely erased;
- applying a drain bias voltage for erasing to a third sector before said second sector is completely erased;
- and
- applying a drain bias voltage for erasing to a next sector before said third sector is completely erased, whereby said sectors are erased sequentially.
A method of erasing a readable, writable and erasable flash memory cell, comprising the steps of;
- applying a drain bias voltage for erasing to any one sector of a memory cell array divided into a plurality of sectors;
- and
- applying a drain bias voltage for erasing to a next sector before said former sector is completely erased, whereby said sectors are erased sequentially.
A device for erasing a readable, writable and erasable flash memory cell, comprising:
- a charge pump for applying a negative bias voltage to a sector of a plurality of sectors of a cell array through a Z-decoder;
- a drain bias voltage generating generator for generating a drain bias voltage;
- a means for supplying a drain bias voltage for erasing to said sectors sequentially, said means supplying a drain bias voltage to any one of said sectors and then supplying a drain bias voltage for erasing to a next sector before said sector is completely erased.
A method of erasing a readable, writable and erasable flash memory cell, comprising the steps of:
- applying a negative bias voltage for erasing to any one sector of a memory cell array divided into a plurality of sectors;
- and
- applying a negative bias voltage for erasing to a next sector before said former sector is completely erased, whereby said sectors are erased sequentially.
A device for erasing a readable, writable and erasable flash memory cell, comprising:
- a negative charge pump for applying a negative bias voltage to a sector of a plurality of sectors of a cell array;
- a means for supplying a negative bias voltage for erasing to said sectors sequentially, said means supplying a negative bias voltage to any one of said sectors and then supplying a negative bias voltage for erasing to a next sector before said sector is completely erased.
Dependencies are inferred from the claim text.