Semiconductor device
AssigneeKabushiki Kaisha Toshiba
InventorsAkiko Ohata, Akira Toriumi
Life of this patent
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Abstract
A semiconductor integrated circuit comprising a first functional block consisting essentially of a first circuit which includes a small junction device, and a second functional block consisting essentially of a second circuit which includes a field effect transistor, the second functional block being mutually connected to the first functional block.
Drawings
Claims3
A semiconductor device comprising:
- a circuit block including a small tunnel junction device;
- and
- a circuit for reading a charge in said small tunnel junction device,
- wherein said small tunnel junction device has a first electrode and a second electrode for controlling the first electrode, and outputs as data a charge transferred during a predetermined period for which a voltage at said second electrode is swept.
A semiconductor device comprising:
- a circuit block including a small tunnel junction device;
- and
- a circuit for reading a charge in said small tunnel junction device,
- wherein said small tunnel junction device has a first electrode and a second electrode for controlling the first electrode, and outputs as data a capacitance between said first and second electrodes.
A semiconductor device comprising:
- a semiconductor substrate;
- an insulating layer provided on said semiconductor substrate;
- a semiconductor layer provided on said insulating layer and having first and second regions;
- a field-effect transistor provided in the first region of said semiconductor layer;
- and
- a single-electron transistor provided in the second region of said semiconductor layer;
- wherein said single-electron transistor has an intermediate electrode located in the second region of said semiconductor layer, and said field-effect transistor includes:
- a source region and a drain region spaced apart from the first region;
- a channel region located between said source and drain regions and having side walls on both sides thereof;
- a pair of gate insulating films provided on the side walls of said channel region, respectively;
- a first gate electrode provided on one of said gate insulating films;
- and
- a second gate electrode provided on the other of said gate insulating films .
Dependencies are inferred from the claim text.