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AssigneeInformation Storage Devices, Inc.
InventorsLawrence D. Engh, Trevor Blyth
Estimating the term…
An integrated circuit which operates to store an input analog signal within an analog storage device such as an EEPROM is disclosed. Initially, a target voltage is determined for applying to the memory cell with the target voltage set to about 90% of the input analog signal voltage. A high voltage ramp is applied to the memory cell to set the voltage of the memory cell to the target voltage. A read operation is simultaneously performed while the high voltage ramp is applied to detect the voltage stored on the cell and to terminate the application of the high voltage ramp once the target voltage is reached. Thereafter, a normal read operation is performed on the memory cell to detect the actual voltage of the cell. A new target voltage is determined based upon the actual voltage of the memory cell and the input analog signal voltage. The high voltage ramp is again connected to the memory cell to set the cell to the new target voltage while a simultaneous read operation is performed. The "read-while-writing" operations are performed a predetermined number of times to achieve precise programming of the cell. Different embodiments are disclosed.
In an analog memory device, a method for storing a voltage level within a storage element of said device, said method comprising the steps of:
A method for storing an input voltage level within an analog memory storage element, said method comprising the steps of:
In an analog memory device, a method for storing an analog signal as a difference voltage between a pair of storage elements of said device, said method comprising the steps of:
In an analog memory device, a method for storing a voltage level within a storage element of said device, said method comprising the steps of:
An apparatus for storing a voltage level within a storage element, said apparatus comprising:
Dependencies are inferred from the claim text.