Multiplication apparatus and methods which generate a shift amount by which the product of the significands is shifted for normalization or denormalization

A multiplier comprising:

• a first circuit for multiplying significands of operands and generating a product of the significands;
• a second circuit for generating a shift amount by which the product of the significands is to be shifted to reduce the number of leading non-significant digits in the product of the significands or to increase an exponent of a product of the operands to a minimum value;
• and
• a shifter for shifting the product of the significands by the shift amount generated by the second circuit;
• wherein the shift amount is to be generated no later than the product of the significands.

A method for multiplying floating point operands by a computer unit, the method comprising:

• multiplying by the computer unit significands of the operands, and generating a product of the significands;
• generating by the computer unit a shift amount by which the product of the significands is to be shifted for normalization of the product of the significands or denormalization of the product of the significands, denormalization to be performed if needed to increase an exponent of a product of the operands to a minimum value;
• and
• shifting the product of the significands by the shift amount generated by the computer unit;
• wherein the shift amount is generated no later than the product of the significands.

A multiplier comprising:

• a first circuit for multiplying significands of operands and generating a product of the significands;
• a second circuit for generating a shift amount by which the product of the significands is to be shifted for normalization of the product of the significands or denormalization of the product of the significands, the denormalization to be performed if needed to increase an exponent of a product of the operands to a minimum value;
• and
• a shifter for shifting the product of the significands by the shift amount generated by the second circuit;
• wherein the shift amount is generated in a clock cycle preceding a clock cycle in which the product of the significands is generated.

A method for multiplying floating point operands by a computer unit, the method comprising:

• multiplying by the computer unit significands of the operands, and generating a product of the significands;
• generating by the computer unit a shift amount by which the product of the significands is to be shifted to reduce the number of leading non-significant digits in the product of the significands or to increase an exponent of a product of the operands to a minimum value;
• and
• shifting the product of the significands by the shift amount generated by the computer unit;
• wherein the shift amount is generated in a clock cycle preceding a clock cycle in which the product of the significands is generated.