Bottom lead semiconductor package with recessed leads and fabrication method thereof

A fabrication method of a bottom lead semiconductor package, comprising:

• attaching a semiconductor chip by a nonconductive adhesive on upper surfaces of a plurality of leads, wherein each of the leads includes a bottom portion and an inner portion that extends from the bottom portion, wherein the bottom and inner portions are non-coplaner;
• connecting bond pads of the chip to the inner portions with conductive media;
• attaching a nonconductive tape on lower surfaces of the bottom portions and inner portions of the leads;
• packaging the semiconductor chip, the leads and the conductive media with a molding resin such that the lower surfaces of the bottom and inner portions of the leads are exposed outside the molding resin;
• and
• removing the nonconductive tape from the leads.

A package comprising:

• a chip having a plurality of bond pads;
• a plurality of leads, each lead having first and second non-coplaner portions joined by an inclined portion, wherein the first, second and inclined portions have first and second surfaces;
• an adhesive that attaches the chip to said plurality of leads;
• a plurality of conductive media which couples corresponding bond pads to the second portions of corresponding leads;
• a package body that molds said chip, said plurality of conductive media, said adhesive and said plurality of leads, wherein the package body covers the first surfaces of the first, second and inclined portions of the leads, wherein said second surface of said first portion of each of the leads is exposed from said package body, and wherein said package body includes a plurality of openings such that said second surface of said second portion and said inclined portion of each of the leads is exposed from said package body.

A device, comprising:

• a chip package, including:
• a chip having a plurality of bond pads,
• a plurality of leads, wherein each of the leads includes a first portion and a second portion, wherein the first and second portions are non-coplaner, and wherein the leads have first and second surfaces,
• a plurality of conductive media that couple bond pads on the chip to the second portions of corresponding leads, and
• a package body that molds the chip, the leads and the plurality of conductive media such that the second surfaces of the first portions of the leads are exposed outside the package body, and wherein a plurality of openings are formed in the package body to expose second surfaces of the second portions of the leads that are recessed inside the package body;
• a printed circuit board having a plurality of connection pads;
• and
• a plurality of solder joints formed in the plurality of openings to couple the second portions of the leads to corresponding ones of the connection pads of the printed circuit board.

A chip package, comprising:

• a chip having a plurality of bond pads,
• a plurality of leads, wherein each of the leads includes a first portion, a second portion, and an inclined portion joining the first and second portions, wherein the first and second portions are non-coplaner, and wherein the leads have first and second surfaces,
• a plurality of conductive media that couple bond pads on the chip to the second portions of corresponding leads, and
• a package body that molds the chip, the leads and the plurality of conductive media such that the second surfaces of the first portions of the leads are exposed outside the package body, and wherein a plurality of openings are formed in the package body to expose second surfaces of the inclined portions of the leads.