Device for writing and reading of size reduced video on a video screen by fixing read and write of alternating field memories during resize operation

A reduced video processing circuit comprising:

• a reduction processing circuit for reducing an input video signal according to a reduction ratio to form a reduced video data;
• first and second buffer memories to which the reduced video data from the reduction processing circuit is written alternately;
• a write control circuit coupled to a reduction ratio data input for controlling the alternate writing of the reduced video data to the first and second memories, the write control circuit generating a video size data according to the reduction ratio data input;
• and
• a read control circuit for controlling alternate reading of the reduced video data from the first and second memories, the read control circuit coupled to the write control circuit for receiving the video size signal and for transmitting control signals between the read and write control circuits;
• wherein the write control circuit is operable, in response to a change in the reduction ratio data input, to transmit a first control signal to the read control circuit;
• the read control circuit is operable, in response to receiving the first control signal, to fix a read memory on the first buffer memory and to read the video data therefrom according to the video size signal received prior to receiving the first control signal, and to transmit a second control signal to the write control circuit;
• the write control circuit is operable, in response to receiving the second control signal, to fix a write memory on the second buffer memory and to write the reduced video data thereto according to the changed reduction ratio data input, and to transmit a third control signal to the read control circuit;
• the read control circuit is operable, in response to receiving the third control signal, to fix a read memory on the second buffer memory, to read the video data therefrom according to the changed video size data, and to transmit a fourth control signal to the write control circuit;
• the write control circuit is operable, in response to receiving the fourth control signal, to release fixing of the write memory and transmits a fifth control signal to the read control circuit;
• and
• wherein the read control circuit is operable, in response to receiving the fifth control signal, to release fixing of the read memory.

A method of obtaining a display video signal by reducing an input video signal according to a reduction ratio to form reduced video data which is written into a first and a second buffer memory alternately so that reduced video data written is read from the first and the second buffer memory alternately, the writing and reading of data being controlled by a write control circuit and a read control circuit, respectively, the method comprising:

• transmitting a first control signal from the write control circuit to the read control circuit in response to a change in the reduction ratio data input;
• fixing a read memory on the first buffer memory in response to the first control signal to read the video data therefrom;
• transmitting a second control signal from the read control circuit to the write control circuit;
• fixing a write memory on the second buffer memory in response to the second control signal to write the reduced video data thereto;
• transmitting a third control signal from the write control circuit to the read control circuit;
• fixing a read memory on the second buffer memory in response to the third control signal to read the video data therefrom;
• transmitting a fourth control signal from the read control circuit to the write control circuit;
• releasing the fixing of the write memory in response to the fourth control signal;
• transmitting a fifth control signal from the write control circuit to the read control circuit;
• and
• releasing the fixing of the read memory in response to the fifth control signal.