Article comprising a power amplifier with feed forward linearizer using a RLS parameter tracking algorithm

A feedforward linearizer for amplifying an input signal comprises:

• a signal cancellation circuit having a first signal cancellation branch and a second signal cancellation branch;
• a first amplifier provided in said first signal cancellation branch, said amplifier configured to receive said input signal intended to be amplified;
• a signal cancellation vector modulator coupled to said first amplifier, and configured to receive an output signal provided by said first amplifier;
• a signal cancellation adder coupled to said signal cancellation vector modulator and configured to receive the signal generated by said signal cancellation vector modulator, said signal cancellation adder configured to receive said input signal via said second signal cancellation branch and to provide an error signal;
• an error cancellation circuit having a first error cancellation branch and a second error cancellation branch;
• an error cancellation adder in said first error cancellation branch, said error cancellation adder configured to receive the output signal provided by said first amplifier;
• the output of said error cancellation adder provide the output signal of said linearizer;
• an error cancellation vector modulator in said second error cancellation branch, configured to receive said error signal provided by said signal cancellation adder and provide an error adjusted signal;
• a second auxiliary amplifier coupled to said error cancellation vector modulator configured to provide an input signal to said error cancellation adder;
• a digital signal processor comprising a signal processing circuit that is configured to calculate a signal cancellation adjustment signal, .alpha., and an error cancellation adjustment signal, .beta., said digital signal processor configured to provide said signal cancellation adjustment signal, .alpha., to said signal cancellation vector modulator and to provide said error cancellation adjustment signal, .beta., to said error cancellation vector modulator, such that the output signal of said signal cancellation adder is a signal that substantially represents the error components provided by said first amplifier, and the output signal of the error cancellation adder is an amplified version of the input signal, with substantially no intermodulation components.