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US 5,963,060 AGranted
Latching sense amplifier
AssigneeIntel Corporation
InventorsHemmige D. Varadarajan, Jeffrey K. Greason
Life of this patent
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Abstract
Briefly, in accordance with one embodiment of the invention, an integrated circuit includes: a latching sense amp circuit. The latching sense amp circuit is configured in the integrated circuit so that the signals to produce and latch an output signal consist essentially of a precharge pulse and a capture pulse.
Claims18
An integrated circuit comprising:
- a latching sense amp circuit;
- said latching sense amp circuit being coupled so that signals applied to produce and latch an output signal from at least an input signal source consist essentially of a precharge pulse and a capture pulse, a voltage signal source being decoupled from said latching sense amp circuit during application of the capture pulse to said latching sense amp circuit.
A latching sense amplifier circuit comprising:
- a differential amplifier stage;
- a regenerative feedback loop state;
- said stages being coupled so that a voltage signal source is decoupled from said latching sense amplifier circuit during application of a capture pulse to said latching sense amplifier circuit;
- and
- wherein said stages are further coupled so that signals applied to produce and latch an output signal consist essentially of a precharge pulse and a capture pulse.
2 more elements
A method of amplifying and latching a voltage signal using a latching sense amplifier circuit including a differential amplifier stage coupled to a regenerative feedback loop stage, said method comprising:
- applying signals to produce and latch an output signal from the voltage signal, said applied signals consisting essentially of a precharge pulse and a capture pulse;
- and
- decoupling the voltage signal source from said latching sense amplifier circuit during application of the capture pulse.
Dependencies are inferred from the claim text.