US 5,963,054 A · High voltage CMOS logic circuit using low voltage transistors

Abstract

A logic gate arrangement for switching voltages greater than the gate breakdown voltage of the transistors in the gate. Two transistors of different conductivity types, are disposed between the N and P transistors which perform the logic function of a conventional CMOS gate. The gates of the two transistors are connected to a first voltage that is less than the breakdown voltage of the transistors, with the entire logic gate being supplied with a voltage that is greater than the first voltage. Three outputs are provided, two with limited voltage swings that drive other like gates or conventional CMOS gates and the other output having a full voltage swing. Logic gates implementing various logic functions, such as NAND and NOR, are disclosed. Further, a cross-coupled logic gate is disclosed which can operate as a latch or as a logic voltage translator circuit.

Claims20

Dependent claims

In an integrated circuit, a first logic gate having a first logic function comprising:

at least one first transistor of a first conductivity type, having two outputs and an input, the outputs thereof coupling between a first power supply terminal and a first node;
a second transistor of the first conductivity type, having two outputs and an input, the outputs coupling between the first node and a second node, and the input coupling to a second power supply terminal;
a third transistor of a second conductivity type, having two outputs and an input, the outputs thereof coupling between the second node and a third node, the input coupling to the second supply terminal;
at least one fourth transistor of the second conductivity type, having two outputs and an input, the outputs thereof coupling between a third node and a third power supply terminal;
and
a capacitor coupling between the first and third nodes;
wherein the at least one first transistor and at least one fourth transistor provide in combination the first logic function.

4 more elements

Dependencies are inferred from the claim text.

High voltage CMOS logic circuit using low voltage transistors

Life of this patent

High voltage CMOS logic circuit using low voltage transistors

Life of this patent

Abstract

Claims20