Switching voltage regulator having a charge pump circuit
AssigneeSTMicroelectronics S.r.l.
InventorGianluca Colli
Life of this patent
Estimating the term…
Abstract
A voltage regulator (400) having a charge pump includes a bias current circuit (402) which produces a bias current (I.sub.bias). The bias current (I.sub.bias) is mirrored by a first mirror circuit (404) and multiplied by gain stage Q4.sub.beta and mirrored again by a factor "c" on the output of DMOS2. The same I.sub.bias is mirrored by a ratio "b" and multiplied by the product of Q5.sub.beta and Q6.sub.beta. The push-pull current operation at the output terminal (416) is obtained by turning on and off switches SW1 (418) and SW2 (420) that are controlled by a clock signal. The voltage regulator (400) further includes an output voltage clamp (424) that keeps control of the V.sub.boost voltage by controlling the amount of bias current (I.sub.bias).
Claims10
A voltage regulator with a charge pump circuit for use in a semiconductor integrated circuit having an output terminal, comprising:
- a bias current circuit providing a bias current (I.sub.bias);
- a first mirror circuit coupled to the bias current circuit which mirrors I.sub.bias by a defined first ratio and provides a first mirrored current;
- a first gain stage coupled to the first mirror circuit which provides a gain adjustment to the first mirrored current;
- a second mirror circuit coupled to the first gain stage which mirrors the gain adjusted first mirrored current by a defined second ratio and provides a second mirrored current at the output terminal;
- a third mirror circuit coupled to the bias current circuit which mirrors I.sub.bias by a defined third ratio and provides a third mirrored current;
- and a second gain stage coupled to the third mirror circuit which provides a gain adjustment to the third mirrored current and provides a gain adjusted third mirrored current at the output terminal.
A charge pump circuit having an output terminal, comprising:
- first and second switching circuits;
- a clock circuit coupled to the first and second switching circuits, the clock circuit generating a clock signal which controls the operation of the first and second switching circuits, the first and second switching circuits controlling the flow of current to and from the output terminal;
- and
- a voltage clamp, the voltage clamp including:
- a level shifter;
- a voltage divider coupled to the level shifter;
- and
- a transconductor coupled to the voltage divider, the transconductor providing a control current which adjusts the amount of current which is pushed and pulled to and from the output terminal.
Dependencies are inferred from the claim text.