Semi-conductor die interconnect
AssigneeIntegrated Device Technology, Inc.
InventorsChristopher Paul Wyland, Atlantico S. Medina
Life of this patent
Estimating the term…
Loading patent…
AssigneeIntegrated Device Technology, Inc.
InventorsChristopher Paul Wyland, Atlantico S. Medina
Estimating the term…
An improved flip-chip bond connection and bonding method uses a "press fit" bond between a set of bond pad bumps or projections on a semiconductor chip and corresponding set of substrate bumps or projections on a substrate to self-align the chip with the substrate and enable flip-chips to be inexpensively bonded to substrates or packages with greater accuracy and a smaller pad pitch than previously achieved. In the method after normally one of the sets of bond pad bumps or substrate bumps has been cooled to shrink or contract so that the facing surfaces of each of the pad bumps and substrate bumps can be interdigitated, the chip and substrate are moved together so that the respective bumps are in a substantially common plane. The one cooled set of bumps is then warmed to expand that set of bumps sufficiently to form a lateral press-fit force between the facing surfaces, physically securing and electrically connecting the respective sets of bumps.
A structure electrically connecting a semiconductor die with a substrate, comprising:
A structure for electrically connecting a semiconductor die with a substrate, comprising:
Dependencies are inferred from the claim text.