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US 5,962,922 AGranted
Cavity grid array integrated circuit package
OwnerBily Wanginventor
Life of this patent
Estimating the term…
Abstract
A flat package for integrated circuit chip has a substrate with plated through holes. The top flange of a plated through hole is interconnected to a terminal of the IC chip. The bottom flange of the through hole has a cavity recessed into the substrates. A solder is placed between a circuit contact on a mother board and the bottom flange. Upon heating, the solder rises to fill the cavity, to make connection between the terminal on the IC chip and the contact on the mother board.
Claims6
A semiconductor device flat package, comprising:
- an insulating substrate;
- a semiconductor device mounted on a top surface of said substrate;
- a conducting plated through hole tunneling through said substrate, having a top conducting flange hanging over said substrate and a bottom conducting flange extending along the bottom surface of the substrate and pressing against the bottom surface of said substrate,
- said top flange being interconnected to a terminal of the semiconductor device, and
- said bottom flange having a cavity which is recessed into the bottom surface of the substrate and which a melted solder fills to connect said bottom flange and a circuit contact of a motherboard and wherein said cavity is not aligned with the plated through hole.
2 more elements
Dependencies are inferred from the claim text.