MISFET and complementary MISFET device having high performance source and drain diffusion layer
AssigneeNEC Corporation
InventorKiyoshi Takeuchi
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AssigneeNEC Corporation
InventorKiyoshi Takeuchi
Estimating the term…
A source and drain diffusion layer of a transistor has a junction of a shallow depth and low in parasitic resistance and parasitic capacitance. The transistor includes a gate insulator formed on a principal plane of a semiconductor substrate, a gate electrode formed on the gate insulator, and source and drain diffusion layers of one conductivity type formed on the principal plane of the semiconductor substrate across the gate electrode. A semiconductor thin film layer doped with an impurity of the same conductivity type is selectively deposited on the principal plane of the semiconductor substrate on which the source and drain diffusion layers are formed. A facet face is formed at an end portion of the semiconductor thin film which opposes to a sidewall of the gate electrode. The facet face has an inclination angle between a sidewall face of the gate electrode and the principal plane of the semiconductor substrate.
An MISFET, comprising:
A complementary MISFET device comprising:
Dependencies are inferred from the claim text.