Opportunistic use of pre-corrected data to improve processor performance

A method of providing a processing unit of a microprocessor with pre-corrected data, the method comprising the steps of:

• a) simultaneously providing both a bypass buffer and error correction hardware with data fetched from memory;
• b) if the processing unit is stalled, inputting the fetched data into the processing unit via a data bus connecting the bypass buffer to the processing unit;
• c) determining whether the fetched data is correct, and if the fetched data is incorrect, signaling the processing unit that data provided to it via the bypass buffer is incorrect;
• and
• d) if fetched data was not input to the processing unit via the bypass buffer, or if the processing unit was signalled in step c) that fetched data was determined to be incorrect, providing corrected data to the processing unit via the error correction hardware.

A method of providing a processing unit of a microprocessor with pre-corrected data, the method comprising the steps of:

• a) simultaneously providing both a bypass buffer and error correction hardware with data fetched from memory;
• b) if a data bus connecting the bypass buffer to the processing unit is currently available, inputting the fetched data into the processing unit via a data bus connecting the bypass buffer to the processing unit;
• c) determining whether the fetched data is correct, and if the fetched data is incorrect, signaling the processing unit that data provided to it via the bypass buffer is incorrect;
• and
• d) if fetched data was not input to the processing unit via the bypass buffer, or if the processing unit was signalled in step c) that fetched data was determined to be incorrect, providing corrected data to the processing unit via the error correction hardware.