Split branch system utilizing separate set branch, condition and branch instructions and including dual instruction fetchers

A method of operating a computer to fetch decode and execute instructions which computer has storage circuitry holding a plurality of instructions at respective storage locations, said plurality of instructions being arranged in instructions strings, each string comprising a first instruction and a set of subsequent instructions the method comprising:

• fetching a sequence of instructions from said storage circuitry and providing an indication of a next address at which a next fetch operation is to be effected, wherein a first instruction fetcher fetches subsequent instructions and a second instruction fetcher fetches new instructions;
• decoding said instructions;
• executing each instruction in turn, wherein at least some of said instruction strings each include,
• (a) a set branch instruction (SET) which provides an indication of a target location from which a subsequent instruction may be fetched, the subsequent instruction being from a different instruction string,
• (b) a condition instruction which defines a condition for a branch to be taken, and
• (c) an effect branch instruction for implementing the branch;
• on execution of said set branch instruction, holding the indication of said target location in a target store, fetching in parallel the subsequent instructions from the string containing said branch instruction and the new instructions from said different instruction string commencing from said target location;
• continuing to execute said subsequent instructions until the effect branch instruction is executed which indicates that further instructions to be executed are said new instructions if the condition defined by the condition instruction is satisfied;
• and
• responding to said effect branch instruction by commencing execution of said new instructions, said effect branch instruction selecting which of said first and second instruction fetchers supplies instructions for execution.

A computer system for fetching, decoding and executing instructions comprising:

• storage circuitry for holding a plurality of instructions at respective storage locations, said plurality of instructions being arranged in instruction strings, each string comprising a first instruction and a set of subsequent instructions;
• instruction fetch circuitry for fetching a sequence of instructions from said storage circuitry and including an indicator for providing an indication of a next address at which a next fetch operation is to be effected and a first and second instruction fetcher for fetching respectively subsequent instructions and new instructions;
• execution circuitry or executing fetched instructions, wherein at least one of said instruction strings includes a set branch instruction (SET) which provides an indication of a target location from which a subsequent instruction may be fetched, the subsequent instruction being from a different instruction string, and an effect branch instruction different from said set branch instruction and located at the branch point after which said new instructions are to be executed, and wherein said instruction fetch circuitry is operated responsive to execution of a said set branch instruction (SET) to fetch in parallel the subsequent instructions from said string containing said set branch instruction and the new instructions from said different instruction string commencing from said target location while said subsequent instructions continue to be executed;
• and
• select circuitry responsive to execution of an effect branch (DO) instruction to cause said execution circuitry to execute said new instructions if a condition determined by the effect branch instruction is satisfied, wherein said select circuitry is operable to connect a selected one of said first and second instruction fetchers to said selection circuitry.

A method of operating a computer to fetch decode and execute instructions which computer has storage circuitry holding a plurality of instructions at respective storage locations, said plurality of instructions being arranged in instruction strings, each string comprising a first instruction and a set of subsequent instructions the method comprising:

• fetching a sequence of instructions from said storage circuitry and providing an indication of a next address at which a next fetch operation is to be effected, wherein a first instruction fetcher fetches subsequent instructions and a second instruction fetcher fetches new instructions;
• decoding said instructions;
• executing each instruction in turn, wherein at least one of said instruction strings includes a set branch instruction (SET) which provides an indication of a target location from which a subsequent instruction may be fetched, the subsequent instruction being from a different instruction string;
• on execution of said set branch instruction, fetching in parallel the subsequent instructions from the string containing said branch instruction and the new instructions from said different instruction string commencing from said target location;
• continuing to execute said subsequent instructions until an effect branch instruction is executed which is located at the branch point after which new instructions are to be executed and which indicates that further instructions to be executed are said new instructions if a condition determined by the effect branch instruction is satisfied;
• and
• responding to said effect branch instruction by commencing execution of said new instructions, said effect branch instruction selecting which of said first and second instruction fetchers supplies instructions for execution.