Method for writing to multiple banks of a memory device
AssigneeMicron Technology, Inc.
InventorsTimothy B. Cowles, Jeffrey P. Wright
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsTimothy B. Cowles, Jeffrey P. Wright
Estimating the term…
In a multi-bank memory system such as a synchronous dynamic random access memory (SDRAM), a method of writing data to the banks is provided. This method allows for writing to any number of banks. More particularly, this method allows for writing to a selected number of banks between one and all banks. In addition, the method retains the discrete nature of the selected banks by allowing any row in each bank to be accessed regardless of the rows activated in other banks. As a result, rows of different memory banks that are intended to store similar data may be accessed simultaneously for purposes of writing the data in test and non-test modes. This allows for quicker writing to the SDRAM without the errors that may be created by other fast writing modes, such as data compression.
A method of preparing a memory circuit for receiving data, comprising:
A method of preparing to write to all memory banks of a semiconductor device, comprising:
A method of entering data to memory banks of a semiconductor device, comprising:
A method of storing data in a plurality of memory banks, comprising:
A method of entering data into a plurality of memory banks, comprising:
A method of storing like values in memory locations that are in different memory banks yet have analogous column addresses, comprising:
A method of storing data in a memory device having a plurality of memory banks, wherein each memory bank of said plurality of memory banks includes at least one row line, and each row line of each memory bank comprises at least one column location, wherein said method comprises:
A method of writing data to a memory device, comprising:
A method of operating a synchronous random access memory device, comprising:
A method of operating a computer system including a system clock and an SDRAM circuit, wherein said method comprises:
Dependencies are inferred from the claim text.