Cache array defect functional bypassing using repair mask

A computer system comprising:

• a processor;
• a memory device;
• a cache connected to said processor and said memory device, having a plurality of cache lines for storing memory blocks corresponding to addresses of said memory device, wherein said cache maps a given memory block to one of a plurality of congruence classes each composed of a plurality of said cache lines;
• and
• repair mask means, having a plurality of bit fields each corresponding to a respective one of said cache lines, for preventing access to a selected one of said plurality of cache lines based on a given one of said bit fields corresponding to said selected cache line having a value which indicates that the selected cache line is defective, wherein said repair mask means prevents a defective cache line from ever being chosen as a victim for cache replacement, and said repair mask means prevents access to the defective cache line by effectively removing the defective cache line from its respective congruence class.