Start of access instruction configured to indicate an access mode for fetching memory operands in a microprocessor
AssigneeAdvanced Micro Devices, Inc.
InventorJames K. Pickett
Life of this patent
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Abstract
A microprocessor is provided which supports a start of access instruction. Upon execution of the start of access instruction, the microprocessor establishes a local access mode provided by the instruction. Memory operands fetched for instructions subsequent to the start of access instruction (in program order) are fetched in accordance with the local access mode. Memory operands fetched for instructions prior to the start of access instruction are fetched in accordance with a global access mode established for each page of memory.
Claims18
A method for providing specialized fetching of memory operands for a particular code sequence executed in a microprocessor, comprising:
- executing a start of access instruction within said microprocessor prior to executing said particular code sequence, wherein said start of access instruction provides a local access mode indicative of a memory access pattern within said particular code sequence;
- generating an access mode corresponding to a particular memory operation within said particular code sequence from said local access mode and a global access mode corresponding to a page containing an address of said particular memory operation;
- determining a cache policy corresponding to said address in response to said access mode;
- and
- fetching memory operands specified by said particular code sequence during said executing said code sequence in response to said access mode.
A microprocessor comprising:
- a data cache for storing data;
- and
- a load/store unit coupled to said data cache, wherein said load/store unit is configured to convey an address and an access mode corresponding to a memory operation to said data cache, and wherein said access mode determines a cache policy corresponding to said address, and wherein said load/store unit is configured to generate said access mode in response to a global access mode corresponding to a page containing said address and a local access mode provided by a start of access instruction.
A load/store unit for performing memory operations to a data cache, comprising:
- an access mode control register configured to store a local access mode indicative of a memory access pattern within a particular code sequence, wherein said local access mode is stored into said access mode control register in response to a start of access instruction included within said particular code sequence;
- and
- an access mode generation unit coupled to said access mode control register and coupled to receive a global access mode corresponding to a page containing an address of a particular memory operation, wherein said access mode generation unit is configured to generate an access mode corresponding to said particular memory operation from said local access mode and said global access mode, and wherein said access mode determines a caching policy corresponding to said address.
Dependencies are inferred from the claim text.