Superscalar processor with forward map buffer in multiple instruction parallel issue/execution management system
AssigneeNEC Corporation
InventorMasato Motomura
Life of this patent
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Abstract
A multiple instruction parallel issue/execution management system including a forward map buffer for storing forward map information indicating whether or not the result value generated by execution of a given instruction is used an input operand in other instructions. The forward map buffer previously stores the forward map information for the result value, before the result value corresponding to the given instruction is actually generated, and when the result value corresponding to the given instruction is actually generated, the operands using the result value are specified by using the previously stored forward map information corresponding to the result value, and supplied to an instruction using the result value as an input operand.
Claims13
A multiple instruction parallel issue/execution management system incorporated in a superscalar type processor configured to dynamically issue and execute a plurality of instructions in parallel, the system including:
- a forward map buffer storing forward map information indicating whether or not a result value generated by execution of a given instruction is used as an input operand in other instructions, said forward map information being stored in a predetermined field of an instruction format, said forward map buffer previously storing said forward map information for said result value, before said result value corresponding to said given instruction is actually generated, so that when said result value corresponding to said given instruction is actually generated, anoperand using said result value is specified by using said previously stored forward map information corresponding to said result value, and supplied to an instruction using said result value as said operand.
Dependencies are inferred from the claim text.