Apparatus and method for identifying the features and the origin of a computer microprocessor

A method for identifying a microprocessor during operation of the microprocessor by selecting identifying information including an indicia of origin and other identifying information, comprising the steps of:

• (a) selecting one type of information from a first type of identification information including an indicia of origin and a second type of identification information including information indicative of features of the microprocessor;
• (b) executing an identification instruction by performing operations described below in steps (c) and (d);
• (c) if in step (a) the first type of identification information has been selected, then executing the identification instruction includes performing the steps of:
• (c)(i) reading an indicia of origin from a memory;
• (c)(ii) storing the indicia of origin in a first register in the microprocessor;
• and
• (d) if in step (a) the second type of identification information has been selected, then executing the identification instruction includes performing the steps of:
• (d)(i) reading at least one data field from the memory having microprocessor identification information stored therein;
• and
• (d)(ii) storing the microprocessor identification in a one of the first register and a second register in the microprocessor.

In a microprocessor, an identification apparatus for identifying the microprocessor in response to an ID instruction, the identification apparatus comprising:

• a plurality of general purpose registers for storing and reading data;
• a first memory element that includes indicia of origin data;
• a second memory element that includes ID data fields that identify the microprocessor;
• a decoder for decoding instructions;
• control circuitry coupled to the decoder for receiving decoded instructions from the decoder, including ID instruction execution circuitry for executing an ID instruction received from the decoder, the ID instruction execution circuitry including:
• first execution means for reading the indicia of origin data from the first memory element and storing it in at least one of the plurality of registers in response to the ID instruction;
• second execution means for reading the ID data fields from the second memory element and storing them in at least one of the plurality of registers, in response to the ID instructions;
• and
• selection means for selecting between the first execution means and the second execution means.

For a set of microprocessor families including a first group that does not implement a microprocessor ID instruction and a second group that does implement the microprocessor ID instruction, a method for identifying a microprocessor that is a member of the second group, the method comprising the steps of:

• (a) executing a flag test instruction sequence that tests an ID flag to determine whether the microprocessor is in the first group or the second group;
• (b) if execution of the flag test instruction sequence in step (a) indicates that the microprocessor is in the first group, then avoiding execution of a microprocessor ID instruction following the flag test instruction sequence;
• and
• (c) if execution of the flag test instruction sequence in step (a) indicates that the microprocessor is in the second group, then performing the steps of:
• (c)(i) selecting one type of information from a first type of identification information including an indicia of origin and a second type of identification information including information indicative of features of the microprocessor;
• (c)(ii) executing an identification instruction by performing operations described below in step (c)(iii) and (c)(iv);
• (c)(iii) if in step (c)(i) the first type of identification information has been selected, then executing the identification instruction includes performing the steps of:
• (c)(iii)(1) reading an indicia of origin from a read-only memory;
• (c)(iii)(2) storing the indicia of origin in a read/write register in the microprocessor;
• and
• (c)(iv) if in step (c)(i) the second type of identification information has been selected, then executing the identification information includes performing the steps of:
• (c)(iv)(1) reading at least one data field from a memory having microprocessor identification information stored therein;
• and
• (c)(iv)(2) storing the microprocessor identification information in a read/write memory register in the microprocessor.

A non-inferential method for identifying features of a microprocessor, wherein the microprocessor implements the method comprising the steps of:

• (a) reading microprocessor ID data including feature data indicative of the microprocessor's features from a memory element in the microprocessor in response to an ID instruction;
• (b) storing the microprocessor ID data in a register in the microprocessor;
• (c) reading the microprocessor ID data in a program;
• (d) identifying the microprocessor's features from the microprocessor ID data;
• and
• (e) enabling the identified features in the program.

A non-inferential method for identifying features of a microprocessor, wherein the microprocessor implements the method comprising the steps of:

• a) reading feature data from a memory in the microprocessor in response to an ID instruction;
• b) storing the feature data in a first register in the microprocessor;
• and
• c) comparing the feature data in the first register with a predetermined comparison string to determine the features of the microprocessor.

In a microprocessor, an identification apparatus for non-inferentially identifying the microprocessor in response to an ID instruction, the apparatus comprising:

• a register;
• a processor memory element storing an indicia of origin data;
• a decoder for decoding program instructions including an ID instruction;
• and
• control circuitry coupled to the decoder, the control circuitry reading the indicia of origin data from the processor memory element and storing at least a portion of the indicia of origin data in the register in response to the ID instruction received by the decoder.

A method for enabling program features associated with particular features of a microprocessor for a program executing on the microprocessor, wherein the microprocessor implements the method comprising the steps of:

• a) reading an indicia of origin from a memory in the microprocessor in response to an ID instruction;
• b) storing the indicia of origin in a first register in the microprocessor;
• c) comparing the indicia of origin in the first register with a predetermined comparison string to identify a specific microprocessor;
• d) reading feature data from the memory to determine particular features of the specific microprocessor;
• and
• e) enabling program features of the program in accordance with the indicia of origin and the particular features of the specific microprocessor.