Adaptive congestion control mechanism for modular computer networks

A method of reducing network congestion in a system in which a client computer is connected to a network, comprising the steps of:

• partitioning network traffic into a plurality of packet types;
• providing a plurality of send buffers;
• providing a plurality of receive buffers;
• providing a plurality of virtual I/O channels;
• associating each of the plurality of packet types with a virtual I/O channel;
• assigning each large send buffer to one of the plurality of virtual I/O channels;
• assigning each small send buffer to one of the plurality of virtual I/O channels;
• assigning each large receive buffer to one of the plurality of virtual I/O channels;
• and
• assigning each small receive buffer to one of the plurality of virtual I/O channels;
• wherein the step of providing a plurality of send buffers comprises the steps of:
• providing a plurality of large send buffers;
• and
• providing a plurality of small send buffers;
• wherein the step of providing a plurality of receive buffers comprises the steps of:
• providing a plurality of large receive buffers;
• and
• providing a plurality of small receive buffers:
• wherein the step of assigning each large send buffer comprises:
• assigning a large send buffer to the virtual I/O channel associated with read request packets;
• assigning a plurality of large send buffers to the virtual I/O channel associated with write request packets;
• assigning a plurality of large send buffers to the virtual I/O channel associated with message packets;
• assigning a plurality of large send buffers to the virtual I/O channel associated with read response packets;
• assigning a large send buffer to the virtual I/O channel associated with write response packets;
• wherein the step of assigning each small send buffer comprises:
• assigning a plurality of small send buffers to the virtual I/O channel associated with read request packets;
• assigning a small send buffer to the virtual I/O channel associated with write request packets;
• assigning a plurality of small send buffers to the virtual I/O channel associated with message packets;
• assigning a plurality of small send buffers to the virtual I/O channel associated with read response packets;
• assigning a plurality of small send buffers to the virtual I/O channel associated with write response packets;
• wherein the step of assigning each large receive buffer comprises:
• assigning a large receive buffer to the virtual I/O channel associated with read request packets;
• assigning a plurality of large receive buffers to the virtual I/O channel associated with write request packets;
• assigning a plurality of large receive buffers to the virtual I/O channel associated with message packets;
• assigning a plurality of large receive buffers to the virtual I/O channel associated with read response packets;
• assigning a large receive buffer to the virtual I/O channel associated with write response packets;
• and
• wherein the step of assigning each small receive buffer comprises:
• assigning a plurality of small receive buffers to the virtual I/O channel associated with read request packets;
• assigning a small receive buffer to the virtual I/O channel associated with write request packets;
• assigning a small receive buffer to the virtual I/O channel associated with message packets;
• assigning a small receive buffer to the virtual I/O channel associated with read response packets;
• assigning a plurality of small receive buffers to the virtual I/O channel associated with write response packets.

In a computer having a memory, a buffer partitioning device for associating I/O buffers with virtual I/O channels, the device comprising:

• a plurality of send buffers, wherein the plurality of send buffers includes a plurality of large send buffers and a plurality of small send buffers;
• a plurality of receive buffers, wherein the plurality of receive buffers includes a plurality of large receive buffers and a plurality of small receive buffers;
• a plurality of virtual I/O channels connected to the plurality of receive buffers and the plurality of send buffers;
• and
• a plurality of memory mapped registers, wherein one of the plurality of memory mapped registers is associated with each virtual I/O channel and wherein each memory mapped register includes a bitmap indicating which send buffers of the plurality of send buffers and which receive buffers from the plurality of receive buffers are assigned to the memory mapped register's associated virtual I/O channel.

In a computer system having a plurality of packet types, an apparatus for buffer partitioning, comprising:

• a plurality of virtual I/O channels, wherein each of the plurality of virtual I/O channels is assigned to handle a packet type from the plurality of packet types;
• a plurality of send buffers;
• wherein the plurality of send buffers includes a plurality of large send buffers and a plurality of small send buffers;
• a plurality of receive buffers;
• wherein the plurality of receive buffers includes a plurality of large receive buffers and a plurality of small receive buffers;
• a plurality of memory mapped registers, wherein one of the plurality of memory mapped registers is associated with each virtual I/O channel and wherein each memory mapped register includes a bitmap indicating which send buffers of the plurality of send buffers and which receive buffers from the plurality of receive buffers are assigned to the memory mapped register's associated virtual I/O channel.