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US 5,957,370 AGranted
Plating process for fine pitch die in wafer form
AssigneeIntegrated Device Technology, Inc.
InventorTerry R. Galloway
Life of this patent
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Abstract
Apertures in a tape formed on a substrate allow straight plating of solder bumps to heights above 4 mils. The solder bumps are combined with a lower density material to form an hourglass-shaped structure which allows interconnections to bonding pads of electronic components with pitches less than 9 mils.
Claims14
A method for making solder interconnections on an integrated circuit comprising the following steps:
- a) providing a die surface with a first bonding pad;
- b) applying a layer of tape on said die surface;
- c) forming an aperture in said layer of tape, said aperture extending through said layer of tape to said first bonding pad;
- d) filling said aperture with a solder bump;
- e) removing said layer of tape;
- f) providing a surface with a second bonding pad and aligning said second bonding pad with said solder bump on said first bonding pad such that said second bonding pad faces said first bonding pad;
- g) moving said surface proximate to said die surface such that said second bonding pad contacts said solder bump;
- and
- h) heating said solder bump to form a solder column electrically coupling said first bonding pad to said second bonding pad.
6 more elements
Dependencies are inferred from the claim text.