Semiconductor wafer evaluating method and semiconductor device manufacturing method

A semiconductor device manufacturing method comprising the steps of:

• (a-1) preparing a plurality of mirror-polished semiconductor wafers in a certain lot;
• (a-2) extracting predetermined number of semiconductor wafer(s) as sample wafer(s) from said plurality of semiconductor wafers in said lot;
• (b) changing a process defect caused by grinding and polishing including said mirror polishing into a pit and also changing a defect under the surface of said sample wafer(s) into a pit having a detectable size;
• (c) detecting the number of pits on said sample wafer(s) surface after said step (b);
• (d) evaluating a probability of an oxide film dielectric breakdown relative to of said sample wafer(s) on the basis of the number of pits detected in said step (c);
• and
• (e) judging said lot to be acceptable when the evaluation in said step (d) shows that said sample wafer is acceptable,
• wherein predetermined semiconductor devices are formed on said semiconductor wafers in the lot which is judged to be acceptable in said step (e).