Method of making heterojunction bipolar structure having air and implanted isolations

A method of manufacturing emitter-up bipolar transistor cells on a semi-insulating substrate, comprising the steps of:

• sequentially forming a collector contact layer, a collector layer, a base layer, an emitter layer and an emitter contact layer on the substrate where the cells are to be formed;
• changing a region of the emitter contact layer into an insulator so that a conducting path extends across where the cells are to be formed;
• forming an emitter contact metal layer on the emitter contact layer;
• etching the emitter contact layer and the emitter layer to expose the base layer;
• forming a base contact metal layer on the exposed base layer;
• etching the base layer and the collector layer to expose the collector contact layer;
• forming a collector contact metal layer on the exposed collector contact layer;
• and
• disrupting the conducting path;
• both etching steps being performed on the condition that the conducting path is left.

A method of manufacturing collector-up bipolar transistor cells on a semi-insulating substrate, comprising the steps of:

• sequentially forming an emitter contact layer, an emitter layer, a base layer, a collector layer and a collector contact layer on the substrate where the cells are to be formed;
• changing a region of the collector contact layer into an insulator so that a conducting path extends across where the cells are to be formed;
• forming a collector contact metal layer on the collector contact layer;
• etching the collector contact layer and the collector layer to expose the base layer;
• forming a base contact metal layer on the exposed base layer;
• etching the base layer and the emitter layer to expose the emitter contact layer;
• forming an emitter contact metal layer on the exposed emitter contact layer;
• and
• disrupting the conducting path;
• both etching steps being performed on the condition that the conducting path is left.

A method of manufacturing field effect transistor cells on a semi-insulating substrate, comprising the steps of:

• sequentially forming a buffer layer, a channel layer, a carrier supply layer, a contact layer on the substrate where the cells are to be formed;
• changing a region of the contact layer into an insulator so that a conducting path extends across where the cells are to be formed;
• forming source and drain contact metal layers on the contact layer;
• etching the contact layer to form a groove in the contact layer;
• forming a gate metal layer in the groove;
• and
• disrupting the conducting path;
• the etching step being performed on the condition that the conducting path is left.