Testing method and apparatus for verifying correct connection of curcuit elements

Testing apparatus for testing for an erroneous interconnection between separate, redundant circuit portions of a circuit formed of a plurality of said redundant circuit portions, the separate, redundant circuit portions connected in parallel with one another such that each redundant circuit portion receives identical input signals, and said redundant circuit portions, when correctly constructed, respectively providing wholly separate and non-overlapping signal paths for simultaneously generating redundant output signals, wherein each of the redundant circuit portions includes a first circuit element and at least a second circuit element adjacent to said first circuit element in the associated signal path, said apparatus comprising:

• a signal generator positioned at the first circuit element of a first said redundant circuit portion for generating a coded signal having a selected signal value;
• and
• a correct-connection verifier positioned at the adjacent second circuit element of the first redundant circuit portion, said correct-connection verifier for detecting whether the coded signal is received at the adjacent second circuit element, lack of detection of the signal by said correct-connection verifier indicative of an erroneous interconnection between separate, redundant circuit portions.

In a telephonic switch having synchronously-redundant planes, each of said synchronously-redundant planes having a first circuit element and a second circuit element which, when properly connected together, form adjacent circuit elements in a signal path defined by the plane, the signal paths connected in parallel with one another for simultaneous, redundant processing of an input signal applied to the parallel-connected signal paths, an improvement of an apparatus for testing for an erroneous interconnection between the first circuit element of a first selected plane and the second circuit element of a second selected plane, said apparatus comprising:

• a signal generator positioned at the first circuit element of the first selected plane for generating a signal having a selected signal value on the signal path;
• and
• a correct-connection verifier positioned at the adjacent second circuit element of the first selected plane, said correct-connection verifier for detecting whether the signal transmitted by said signal generator is received at the adjacent second circuit element of the first selected plane, lack of detection of the signal by said correct-connection verifier indicative of an erroneous interconnection between the first circuit element of the first selected plane and the second circuit element of the second selected plane.