# US 5,930,164 A · Magnetic memory unit having four states and operating method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 5,930,164 A - Document ID: US5930164A - Status: Granted - Kind: A - Application number: 09/031,195 - Filed: 1998-02-26 - Granted: 1999-07-27 - Earliest claimed: 1998-02-26 - Assignees: Motorola, Inc. - Inventors: Theodore Zhu - Web page: https://patentgrep.com/patent/US5930164A ## CPC - G11C 11/5607: {using magnetic storage elements} - H10B 61/00: Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices - G11C 2211/5615: Multilevel magnetic memory cell using non-magnetic non-conducting interlayer, e.g. MTJ - G11C: STATIC STORES (semiconductor memory devices H10B) - H10B: ELECTRONIC MEMORY DEVICES ## Abstract A new structure of a magnetoresistive random access memory (MRAM) is presented for a high density and fast access operations. The MRAM includes two magnetic memory cells separated by an electrically conductive layer, each cell having two magnetic layers separated by a barrier layer forming a tunneling junction. Each memory cell contains one bit information as directions of magnetic vectors which are switched by an external magnetic field and sensed by a sense current flowing in the MRAM unit. The current creates a drop voltage over the MRAM unit, which indicates four different values according to the states stored in MRAM unit. ## Claims ### Claim 1 A magnetoresistive random access memory (MRAM) unit comprising: a first magnetic memory cell including magnetic layers separated by a first barrier layer forming a tunneling junction; a second magnetic memory cell including magnetic layers separated by a second barrier layer forming a tunneling junction, the second magnetic memory cell having a different resistance from one of the first barrier layer; and an electrically conductive layer sandwiched between the first and second magnetic memory cells. ### Claim 2 (depends on 1) The MRAM unit as claimed in claim 1 wherein the magnetic layers in the first magnetic cell include first pinned and free layers, and the magnetic layers in the second magnetic cell include second pinned and free layers, magnetic vectors in the first and second pinned magnetic layers not being switched by an external magnetic field and magnetic vectors in the first and second free magnetic layers being switched by the external magnetic field. ### Claim 3 (depends on 2) The MRAM unit as claimed in claim 2 further including magnetic layers anti-ferromagnetically coupled with the first and second pinned magnetic layers, respectively. ### Claim 4 (depends on 1) The MRAM unit as claimed in claim 1 wherein the first barrier layer has a different thickness from the second barrier layer. ### Claim 5 (depends on 4) The MRAM unit as claimed in claim 4 wherein the second barrier layer is twice as thick as the first barrier layer. ### Claim 6 (depends on 1) The MRAM unit as claimed in claim 1 wherein the first magnetic memory cell has a different area from the second magnetic memory cell. ### Claim 7 (depends on 1) The MRAM unit as claimed in claim 1 further including a first conductive line electrically coupled to the first magnetic cell for providing a sense current. ### Claim 8 (depends on 7) The MRAM unit as claimed in claim 7 further including further including a switch coupled to the MRAM unit for controlling the sense current. ### Claim 9 (depends on 8) The MRAM unit as claimed in claim 8 further including a second conductive line placed adjacent the MRAM unit for applying an external magnetic field to the MRAM unit. ### Claim 10 (depends on 1) The MRAM unit as claimed in claim 1 wherein the first barrier layer has a different barrier height from the second barrier layer. ### Claim 11 A magnetoresistive random access memory (MRAM) device comprising: a substrate on which the MRAM device is formed; a plurality of MRAM units arranged in rows and columns, each MRAM unit comprising: a first magnetic memory cell including magnetic layers separated by a first barrier layer forming a tunneling junction, a second magnetic memory cell including magnetic layers separated by a second barrier layer forming a tunneling junction, the second magnetic memory cell having a different resistance from one of the first barrier layer, and an electrically conductive layer sandwiched between the first and second magnetic memory cells; a plurality of first conductive lines for providing a sense current, one first conductive line for each row, each first conductive line being electrically coupled to each of the first magnetic memory cell of each MRAM unit in the row; and a plurality of switches electrically coupled to each of the second magnetic memory cell of each MRAM unit. ### Claim 12 (depends on 11) The MRAM device as claimed in claim 11 wherein the magnetic layers in the first magnetic cell include first pinned and first free magnetic layers, and the magnetic layers in the second magnetic cell include second pinned and second free magnetic layers, magnetic vectors in the first and second pinned magnetic layers not being switched by an external magnetic field and magnetic vectors in the first and second free magnetic layers being switched by the external magnetic field. ### Claim 13 (depends on 11) The MRAM unit as claimed in claim 11 wherein the first barrier layer has a different thickness from the second barrier layer. ### Claim 14 (depends on 11) The MRAM unit as claimed in claim 11 wherein the first magnetic memory cell has an different area from the second magnetic memory cell. ### Claim 15 (depends on 11) The MRAM device as claimed in claim 11 further including a plurality of second conductive lines being placed adjacent each of the MRAM units in the column, for applying an external magnetic field generated by a current therein to the MRAM unit. ### Claim 16 (depends on 11) The MRAM device as claimed in claim 11 further including a current source being coupled to the first conductive lines. ### Claim 17 (depends on 11) The MRAM unit as claimed in claim 11 wherein the first barrier layer has a different barrier height from the second barrier layer. ### Claim 18 A method for writing first, second, third, and fourth states in a magnetoresistive random access memory (MRAM) unit including a conductive layer sandwiched between two magnetic tunnel junction cells, each magnetic tunnel junction cell storing one bit information, the method comprising the steps of: applying a first magnetic field having a first strength in a first direction to the MRAM unit when the first state (00) is stored in the MRAM unit; applying a second magnetic field having a second strength in a second direction opposite to the first direction to the MRAM unit when the second state (11) is stored in the MRAM unit; applying the first magnetic field and then applying a third magnetic field having a third strength lower than the second strength in the second direction, to the MRAM unit, when the third state (01) is stored in the MRAM unit; and applying the second magnetic field and then applying a fourth magnetic field having a fourth strength lower than the first strength in the first direction, to the MRAM unit, when the fourth state (10) is stored in the MRAM unit. ### Claim 19 (depends on 17) The method as claimed in claim 17 wherein the step of applying the second magnetic field is a step of applying a magnetic field having a strength equivalent to the first strength in the second direction, and the step of applying the fourth magnetic field is a step of applying a magnetic field having a strength equivalent to the third strength in the first direction. ### Claim 20 A method for sensing first, second, third, and fourth states in a magnetoresistive random access memory (MRAM) unit including a conductive layer sandwiched between two magnetic tunnel junction cells, each magnetic tunnel junction cell storing one bit information, the method comprising the steps of: providing a sense current to the MRAM unit; sensing a drop voltage over the MRAM unit; and determining the state stored in the MRAM unit from the drop voltage in accordance with predetermined criteria. ### Claim 21 (depends on 20) The method as claimed in claim 20 wherein the step of determining the state stored in the MRAM unit from the drop voltage in accordance with predetermined criteria includes a step of determining the state stored in the MRAM unit as the first state when the drop voltage falls within a first voltage range, the second state when the drop voltage falls within a second voltage range, the third state when the drop voltage falls within a third voltage range, and the fourth state when the drop voltage falls within a fourth voltage range.