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AssigneeInformation Storage Devices, Inc.
InventorsLawrence D. Engh, May Lee
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An adaptive amplitude ramp controller that regulates how fast and how high a series of voltages is applied to a targeted non-volatile memory cell. The series of voltages include a coarse ramp pulse and at least one fine ramp pulse. The coarse ramp pulse undergoes a first ramp rate until a particular voltage is reached. Thereafter, it undergoes a second ramp rate until the cycle associated with the coarse ramp pulse is completed or a target voltage is reached. Programming of the non-volatile memory cell occurs during this portion of the course ramp pulse. Thereafter, the adaptive amplitude ramp controller produces at least one fine ramp pulse. The fine ramp pulse is quickly ramped up at a third ramp rate and then undergoes a fourth ramp rate until the final desired voltage of the non-voltage memory cell is generally reached.
A method for programming a memory cell, the method comprising the steps of:
An adaptive ramp amplitude controller providing a series of output ramp voltages used during a corresponding series of write operations on a memory cell, comprising:
A circuit for programming a selected memory cell, the circuit comprising:
A circuit for programming a selected memory cell, the circuit comprising:
Dependencies are inferred from the claim text.