# US 5,917,362 A · Switching circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 5,917,362 A - Document ID: US5917362A - Status: Granted - Kind: A - Application number: 09/010,041 - Filed: 1998-01-21 - Granted: 1999-06-29 - Earliest claimed: 1996-01-29 - Assignees: Sony Corporation - Inventors: Kazumasa Kohama - Web page: https://patentgrep.com/patent/US5917362A ## CPC - H03K 17/693: Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors (logic circuits H03K19/00; code converters H03M5/00, H03M7/00) - H03K 17/6871: {the output circuit comprising more than one controlled field-effect transistor} - H03K 2217/0054: Gating switches, e.g. pass gates - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract Switches are provided on the input and output side of an amplification stage in a signal switching circuit provided in a signal transmission line, and another signal is provided so that a signal can be transmitted directly. Further, a switching circuit is formed from FET elements, which are controlled to be switched on/off by control signals to assure a high isolation. ## Claims ### Claim 1 A signal processing unit comprising: signal switching means including a first input terminal group including one or more input terminals, a first output terminal group including one or more output terminals in a one-to-one correspondence with each of the input terminals of said first input terminal group, a second input terminal group including one or more input terminals, a second output terminal group including one or more output terminals in a one-to-one correspondence with each of the input terminals of said second input terminal group, a first switch for selectively connecting one or more of the input terminals of said first input terminal group and one of the output terminals of said first output terminal group, a second switch for selectively connecting one of the input terminals of said first input terminal group and one of the output terminals of said second output terminal group, and a third switch for selectively connecting one of the input terminals of said second input terminal group and one of the output terminals of said first output terminal group; signal path control means for controlling on/off-states of said first, second and third switches; and two or more signal paths, at least a first signal path having an amplifier such that the signal paths have different gains from each other, to connect one of the output terminals of said second output terminal group and one of the input terminals of said second input terminal group. ### Claim 2 (depends on 1) The signal processing circuit according to claim 1, wherein said first, second and third switches are field effect transistors. ### Claim 3 (depends on 2) The signal processing circuit according to claim 2, wherein said first, second and third switches are formed on a single semiconductor substrate. ### Claim 4 (depends on 1) The signal processing circuit according to claim 1, wherein the signal switching means, the signal path control means, and the signal paths are used to adjust a gain in a transmission circuit that transmits a signal of a high frequency. ### Claim 5 (depends on 1) The signal processing circuit according to claim 1, wherein the signal switching means, the signal path control means, and the signal paths are used to adjust a gain in a reception circuit that receives a signal of a high frequency. ### Claim 6 (depends on 1) The switching circuit according to claim 1, further comprising an attenuator disposed in at least a second signal path of said two or more signal paths. ### Claim 7 A switching circuit formed as an IC, comprising: first, second and third input/output terminals; a first signal route including two or more switching elements connected in series between said first and second input/output terminals; a second signal route including two or more switching elements connected in series between said first and third input/output terminals; a first grounded switching element connected from a junction in between said switching elements of said first signal route to a common ground on the IC; a second grounded switching element connected from said second input/output terminals to to an outside ground located outside the IC; a third grounded switching element connected from a junction in between said switching elements of said second signal route to said second signal route and the common ground; and a fourth grounded switching element connected between from said third input/output terminals to said third input/output terminal and the outside ground. ### Claim 8 (depends on 7) The switching circuit according to claim 7, wherein the switching elements in said first and second signal routes and said first, second, third and fourth grounded switching elements are field effect transistors of gallium arsenite. ### Claim 9 (depends on 8) The switching circuit according to claim 8, wherein the switching elements in said first and second signal paths and said first, second, third and fourth grounded switching elements are junction type field effect transistors. ### Claim 10 (depends on 7) The switching circuit according to claim 7, further comprising resistors inserted between said second and fourth grounded switching elements and the outside ground. ### Claim 11 (depends on 8) The switching circuit according to claim 8, further comprising capacitors inserted between said first, second, third and fourth grounded switching elements and one of the common ground and the outside ground.