Lid wafer bond packaging and micromachining
AssigneeHarris Corporation
InventorsMatthew M. Salatino, William R. Young, Patrick A. Begley
Life of this patent
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Abstract
A wafer level hermetically packaged integrated circuit has a protective cover wafer bonded to a semiconductor device substrate wafer. The substrate wafer may contain a cavity. The cover wafer seals integrated circuits and other devices including but not limited to air bridge structures, resonant beams, surface acoustic wave (SAW) devices, trimmable resistors, and micromachines. Some devices, such as SAWs, are formed on the surface of cavities formed in the protective cover wafer. Die are separated to complete the process.
Claims30
A method for packaging individual die at the wafer level comprising the steps of:
- forming a plurality of die in a device substrate, each die comprising at least one device selected from the group consisting of a microelectronic structure, a micromachine, a micromachine component;
- forming an insulating layer on a lid wafer comprising a semiconductor layer;
- patterning the insulating layer to form a plurality of cavities, each cavity corresponding to one of a different die on the device substrate;
- bonding the insulating layer to the device substrate to seal at least one of the devices inside one of the cavities and form a bonded structure of dice covered and sealed inside the corresponding lid cavities.
A method for packaging individual die at the wafer level comprising the steps of:
- forming a plurality of die in a device substrate, each die comprising at least one device selected from the group consisting of microelectronic structure, micromachines, and micromachinable components;
- patterning an insulating lid layer to form a plurality of cover cavities, each cavity corresponding to one of a different die on the device substrate;
- bonding the insulating lid layer to the device substrate to seal at least one of the devices inside one of the cavities and form a bonded structure of dies covered by corresponding lid cavities;
- removing a portion of the insulating lid layer to provide each die on the device substrate with an individual sealing insulating cover.
A method for packaging individual die at the wafer level comprising:
- forming one or more devices in a semiconductor device substrate wafer;
- forming one or more electrical bond pads in the semiconductor substrate wafer, spaced from the devices and electrically connected to the device(s) in the semiconductor substrate wafer;
- and
- sealing and covering the device(s) with a protective cover wafer bonded to the semiconductor device substrate wafer without covering the bond pads.
Dependencies are inferred from the claim text.