Universal memory element and method of programming same
AssigneeEnergy Conversion Devices, Inc.
InventorsStanford R. Ovshinsky, Boil Pashmakov
Life of this patent
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Abstract
Method of programming Ovonic memory multistate-digital multibit memory elements, and use thereof for neural networks and data storage. The device is programmed by applying an energy pulse which is insufficient to switch the memory element from said high resistance state to said low resistance state, but sufficient to modify said memory material such that accumulation of additional energy pulses causes the memory element to switch from said high resistance state to said low resistance state.
Claims45
A method of programming a digital, multi-level, phase-change memory element comprising a volume of phase-change memory material having at least a high resistance state and a detectably distinct low resistance state, and the ability to be set from said high resistance state to said low resistance state by a set energy pulse, said method comprising the step of:
- writing data into said memory element by applying a program energy pulse to said volume of memory material, wherein said program energy pulse is insufficient to set said memory material from said high resistance state to said low resistance state but sufficient to modify said memory material so that accumulation with at least one additional program energy pulse sets said memory material from said high resistance state to said low resistance state.
A method of setting a volume of phase-change memory material from a high resistance state to a detectably distinct low resistance state, said method comprising the step of:
- applying a plurality of program energy pulses to said volume of memory material, wherein each of said program energy pulses is insufficient to set said memory material from said high resistance state to said low resistance state but sufficient to modify said material so that the accumulation of said plurality of program energy pulses causes said memory material to be set from said high resistance state to said low resistance state.
A method of programming a digital, multi-state, phase-change memory element comprising a volume of phase-change memory material having at least a high resistance state and a detectably distinct low resistance state, and the ability to be set from said high resistance state to said low resistance state by a set current pulse having a set amplitude and a set duration, said method comprising the step of:
- writing data into said memory element by applying one or more program current pulses to said volume of memory material, wherein each of said program current pulses has amplitude equal to said set amplitude, each of said program current pulses having duration insufficient to switch said memory material from said high resistance state to said low resistance state, said one or more program current pulses having integrated duration less than or equal to said set duration.
A parallel processing network comprising:
- (A) means for a parallel input of a plurality of data;
- and
- (B) parallel distributed processing means operative to receive and process said parallel input of said plurality of data, said processing means including:
- (1) a three-dimensional array of stacked planes of a plurality of unit cells;
- each of said unit cells is a single repetition of a repetitive, three-dimensional electrically interconnected pattern;
- each unit cell including:
- (a) data input means;
- (b) data output means;
- and
- (c) a multivalue-digital phase change memory element disposed so as to establish communication between said data input means and said data output means, said memory element including a chalcogenide based volume of memory material having a high resistance state and a detectably distinct low resistance state and the ability to be set from said high resistance state to said low resistance state by a set current pulse having sufficient energy, said memory material programmable to one of a plurality of detectably distinct programmed states by one or more program current pulses, each of said program current pulses insufficient to set said memory element but sufficient to modify said memory material so that accumulation with at least one additional program current pulse sets said memory element;
- and
- (2) means for establishing communication between said data input means of a first one of said unit cells in a first one of said stacked planes and said data output means of a second one of said unit cells in a second one of said stacked planes, said communication occurring through said volume of memory material of at least one of said unit cells, whereby the connection between said input means and said output means is determined by the programmed state of said memory material.
Dependencies are inferred from the claim text.