US 5,909,449 A · Multibit-per-cell non-volatile memory with error detection and correction

Abstract

A multilevel non-volatile memory divides the suitable threshold voltages of memory cells into ranges corresponding to allowed states for storage of data and ranges corresponding to forbidden zones indicating a data error. A read process in accordance automatically checks whether a threshold voltage is in a forbidden zone. In alternative embodiment, a refresh process includes reprogramming the threshold voltage into an allowed state or in the case of a flash memory, reading a sector of the memory, saving data from the sector in a buffer, erasing the sector, and rewriting the data from the buffer back in the sector. Refresh process for the non-volatile memory can be perform in response to detecting a threshold voltage in a forbidden zone, as part of a power-up procedure for the memory, or periodically with a period on the order of days, weeks, or months.

Claims16

Dependent claims

A non-volatile semiconductor memory comprising:

an array of memory cells;
drivers and decoders coupled to apply voltages to the array, as required to write to any memory cell in the array and to read any memory cell in the array, wherein each memory cell that stores data has a threshold voltage that identifies a multibit data value written in the memory cell;
a reference generator that generates first reference signals and second reference signals, wherein the first reference signals indicate bounds of ranges of threshold voltages allowed for the memory cells storing data, and the second reference signals indicate bounds of one or more ranges of threshold voltages forbidden for the memory cells storing data;
and
a control circuit coupled to control the drivers and decoders during a read process, the control circuit including logic that initiates a process to refresh a threshold voltage of a memory cell during a read process that detects the threshold voltage of the memory cell is in a range forbidden for memory cells storing data.

2 more elements

Dependencies are inferred from the claim text.

Multibit-per-cell non-volatile memory with error detection and correction

Life of this patent

Multibit-per-cell non-volatile memory with error detection and correction

Life of this patent

Abstract

Claims16