Method and structure for recovering smaller density memories from larger density memories

A method for recovering a smaller density memory from a larger density memory, comprising the steps of:

• testing a memory device to determine that the memory device will be recovered as a smaller density memory device;
• determining an appropriate logic state for at least a first address buffer connected to a first bond pad of the memory device, wherein the appropriate logic state for the first address buffer defines the smaller density memory device;
• and
• selectively causing the first address buffer to ignore a first signal on the first bond pad so that the appropriate logic state for the first address buffer is maintained on the first address buffer and the smaller density memory device is defined;
• wherein a first selection circuit comprises a disconnect means connected in series with the first bond pad for selectively causing the first address buffer to ignore the first signal on the first bond pad, and a programmable means, connected to a pull-up/pull-down component, for maintaining the appropriate logic state on the first address buffer upon selectively causing the first address buffer to ignore the first signal on the first bond pad;
• and
• wherein the disconnect means is a EEPROM transistor, and the EEPROM transistor is programmed to cause the first address buffer to ignore the first signal on the first bond pad.

A method for recovering a smaller density memory from a larger density memory, comprising the steps of:

• testing a memory device to determine that the memory device will be recovered as a smaller density memory device;
• determining an appropriate logic state for at least a first address buffer connected to a first bond pad of the memory device, wherein the appropriate logic state for the first address buffer defines the smaller density memory device;
• and
• selectively causing the first address buffer to ignore a first signal on the first bond pad so that the appropriate logic state for the first address buffer is maintained on the first address buffer and the smaller density memory device is defined;
• wherein a first selection circuit comprises a disconnect means connected in series with the first bond pad for selectively causing the first address buffer to ignore the first signal on the first bond pad, and a programmable means, connected to a pull-up/pull-down component, for maintaining the appropriate logic state on the first address buffer upon selectively causing the first address buffer to ignore the first signal on the first bond pad, and wherein the pull-up/pull-down component is a ESD transistor.

A method for recovering a smaller density memory from a larger density memory, comprising the steps of:

• testing a memory device to determine that the memory device will be recovered as a smaller density memory device;
• determining an appropriate logic state for at least a first address buffer connected to a first bond pad of the memory device, wherein the appropriate logic state for the first address buffer defines the smaller density memory device;
• and
• selectively causing the first address buffer to ignore a first signal on the first bond pad so that the appropriate logic state for the first address buffer is maintained on the first address buffer and the smaller density memory device is defined;
• wherein a first selection circuit comprises a disconnect means connected in series with the first bond pad for selectively causing the first address buffer to ignore the first signal on the first bond pad, and a programmable means, connected to a pull-up/pull-down component for maintaining the appropriate logic state on the first address buffer upon selectively causing the first address buffer to ignore the first signal on the first bond pad, and wherein the first selection circuit comprises a plurality of nonvolatile devices which selectively cause the first address buffer to ignore the first signal on the first bond pad.

A method for recovering a smaller density memory from a larger density memory, comprising the steps of:

• testing a memory device to determine that the memory device will be recovered as a smaller density memory device;
• determining an appropriate logic state for at least a first address buffer connected to a first bond pad of the memory device, wherein the appropriate logic state for the first address buffer defines the smaller density memory device;
• and
• selectively causing the first address buffer to ignore a first signal on the first bond pad so that the appropriate logic state for the first address buffer is maintained on the first address buffer and the smaller density memory device is defined;
• wherein a first selection circuit comprises a disconnect means connected in series with the first bond pad for selectively causing the first address buffer to ignore the first signal on the first bond pad, and a programmable means, connected to a pull-up/pull-down component, for maintaining the appropriate logic state on the first address buffer upon selectively causing the first address buffer to ignore the first signal on the first bond pad, and wherein the first selection circuit provides ESD protection and has at least a first ESD protection device.

A method for recovering a smaller density memory from a larger density memory, comprising the steps of:

• testing a memory device to determine that the memory device will be recovered as a smaller density memory device;
• determining an appropriate logic state for at least a first address buffer connected to a first bond pad of the memory device, wherein the appropriate logic state for the first address buffer defines the smaller density memory device;
• and
• selectively causing the first address buffer to ignore a first signal on the first bond pad so that the appropriate logic state for the first address buffer is maintained on the first address buffer and the smaller density memory device is defined;
• wherein a first selection circuit comprises a disconnect means connected in series with the first bond pad for selectively causing the first address buffer to ignore the first signal on the first bond pad, and a programmable means, connected to a pull-up/pull-down component, for maintaining the appropriate logic state on the first address buffer, and wherein the first selection circuit comprises a plurality of nonvolatile devices which selectively cause the first address buffer to ignore the first signal on the first bond pad.

A method for recovering a smaller density memory from a larger density memory, comprising the steps of:

• testing a memory device to determine that the memory device will be recovered as a smaller density memory device;
• determining an appropriate logic state for at least a first address buffer connected to a first bond pad of the memory device, wherein the appropriate logic state for the first address buffer defines the smaller density memory device;
• and
• selectively causing the first address buffer to ignore a first signal on the first bond pad so that the appropriate logic state for the first address buffer is maintained on the first address buffer and the smaller density memory device is defined;
• wherein a first selection circuit comprises a disconnect means connected in series with the first bond pad for selectively causing the first address buffer to ignore the first signal on the first bond pad, and a programmable means, connected to a pull-up/pull-down component, for maintaining the appropriate logic state on the first address buffer, and wherein the first selection circuit provides ESD protection and has at least a first ESD protection device.

A method for recovering a smaller density memory from a larger density memory, comprising the steps of:

• testing a memory device to determine that the memory device will be recovered as a smaller density memory device;
• determining an appropriate logic state for at least a first address buffer connected to a first bond pad of the memory device, wherein the appropriate logic state for the first address buffer defines the smaller density memory device;
• and
• selectively causing the first address buffer to ignore a first signal on the first bond pad so that the appropriate logic state for the first address buffer is maintained on the first address buffer and the smaller density memory device is defined;
• wherein for the memory device the first bond pad is representative of an address pin, and for the smaller density device the first bond pad is representative of a control pin that is a chip enable pin.