Method and device for encoding and transmitting bidirectional data from a master circuit to a slave circuit

A data communications system comprising:

• a communications bus solely comprising first and second conductors;
• a master circuit communicably coupled to said communications bus including an output interface configured to hold said first conductor at one of two predetermined potentials, said output interface constructed and arranged to bring the potential of said first conductor regularly, repeatedly, and with a fixed period, to a second potential for first predetermined periods of time before returning to said first potential for second predetermined periods of time, each said first and second predetermined periods having a logical significance;
• and
• a slave circuit communicably coupled to said communications bus comprising a timing circuit for providing a number of preset delays from reception of each transition on said first conductor, and for measuring the voltage on said first conductor by comparison with a predetermined reference value which lies between said first voltage and said second voltage.

A method for encoding and transmitting a clock signal, a supply voltage and bidirectional digital data from a master circuit to a slave circuit, comprising the steps of:

• (a) holding a first conductor at a first voltage for a first period;
• (b) periodically holding the first conductor at a second voltage greater than said first voltage for first predetermined periods, each occurring at a fixed period after a previous instance of raising the first conductor to said second voltage, said first predetermined periods having a logical significance;
• (c) returning, after said step (b), the first conductor to said first voltage for a second predetermined period having a logical significance;
• (d) holding a second conductor at a third voltage different from said first and second voltages;
• (e) measuring a voltage of the first conductor at a temporal offset with respect to said instant of said raising of the first conductor to said second voltage;
• (f) interpreting said measured voltage from said step (e) according to said predetermined logical significances.

A data communications system comprising:

• a communications bus solely comprising first and second conductors;
• a master circuit communicably coupled to said communications bus including,
• means for bringing the potential of said first conductor regularly, repeatedly, and with a fixed period, to a second potential for first predetermined periods of time before returning to said first potential for second predetermined periods of time, each said first and second predetermined periods having a logical significance;
• and
• a slave circuit communicably coupled to said communications bus, including
• timing means for providing a number of preset delays from reception of each transition on said first conductor, and
• measuring means, responsive to said timing means, for measuring the voltage on said first conductor by comparison with a predetermined reference value which lies between said first voltage and said second voltage.

A method for encoding and transmitting a clock signal, a supply voltage and bidirectional digital data from a master circuit to a slave circuit, comprising the steps of:

• (a) holding a first conductor at a first voltage;
• (b) periodically raising the first conductor to a second voltage greater than said first voltage for a first predetermined period of time;
• (c) returning, after said step (b), the first conductor to said first voltage for a second predetermined period, wherein one of said first and second predetermined periods is longer than said fixed period to indicate a chip select command;
• (d) holding a second conductor at a third voltage different from said first and second voltages;
• (e) measuring a voltage of the first conductor at a temporal offset with respect to said instant of said raising of the first conductor to said second voltage;
• (f) interpreting said measured voltage from said step (e) according to said predetermined logical significances;
• and
• (g) raising the first conductor to said second voltage to identify a clock signal.