# US 5,903,249 A · Method for driving active matrix display device

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- Number: US 5,903,249 A
- Document ID: US5903249A
- Status: Granted
- Kind: A
- Application number: 08/538,016
- Filed: 1995-10-02
- Granted: 1999-05-11
- Earliest claimed: 1994-10-07
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Inventors: Jun Koyama; Yuji Kawasaki
- Web page: https://patentgrep.com/patent/US5903249A

## CPC

- G09G 3/3659: {the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes}
- G09G 2300/0809: Several active elements per pixel in active matrix panels
- G09G 2300/0814: used for selection purposes, e.g. logical AND for partial update
- G09G 2320/0214: with crosstalk due to leakage current of pixel switch in active matrix panels
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

The object of the invention is to design for reduction of the effects of thin-film transistor OFF current and to improve image quality in an active matrix display device in which polysilicon thin-film transistors are used. Plural serially connected thin-film transistors are provided for one pixel electrode, different signals are imposed on the gate terminals of respective thin-film transistors, and a signal is written into the pixel when all the serially connected thin-film transistors are in an on state. Further, since the thin-film transistors are connected in series, the voltage imposed on the source and drain electrodes when they are all in an off state is divided, and consequently the voltage across the source and drain electrodes of the thin-film transistor that drives the pixel is smaller and the OFF current is reduced.

## Claims

### Claim 1

A method for driving an active matrix display device comprising:
supplying a first signal in a first stage to a gate of a first transistor provided in an n-th pixel through an n-th gate line, said first transistor being connected with a pixel electrode of said n-th pixel at one of a source and drain of said first transistor; and
supplying a second signal in a next stage to a gate of a second transistor provided in said n-th pixel through an (n+1)-th gate line, one of a source and drain of said second transistor being connected with another source and drain of said first transistor,
wherein a data is written into said pixel electrode of said n-th pixel when all of the transistors provided in said n-th pixel are ON.

### Claim 2

A method for driving an active matrix display device comprising:
supplying a first signal in a first stage to a gate of a first transistor provided in an n-th pixel through an n-th gate line, said first transistor being connected with a pixel electrode of said n-th pixel at one of a source and drain of said first transistor; and
supplying a second signal in a next stage to a gate of a second transistor provided in said n-th pixel through an (n+1)-th gate line, one of a source and drain of said second transistor being connected with another source and drain of said first transistor,
wherein a data is written into said pixel electrode of said n-th pixel when all of the transistors provided in said n-th pixel are ON, and
wherein said n-th pixel further has a transistor connected in parallel with one of said first transistor and said second transistor.

### Claim 3

A method for driving an active matrix display device comprising:
supplying a first signal in a first stage to a gate of a first transistor provided in an n-th pixel through an n-th gate line, said first transistor being connected with a pixel electrode of said n-th pixel at one of a source and drain of said first transistor; and
supplying a second signal in a next stage to a gate of a second transistor provided in said n-th pixel through an (n+1)-th gate line, one of a source and drain of said second transistor being connected with another source and drain of said transistor.
wherein a data is written into said pixel electrode of said n-th pixel when all of the transistors provided in said n-th pixel are ON, and
wherein said n-th pixel further has a transistor connected in series with said first transistor and said second transistor and kept ON constantly.
