US 5,903,139 AGranted

Power stealing solid state switch for supplying operating power to an electronic control device

AssigneeHoneywell Inc.

InventorArlon D. Kompelien

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Abstract

A power stealing circuit provides operating power for a environmental control such as a thermostatic control while controlling the current in a power supply line to a load in response to the cycling output of the environmental control. A pair of power FETs are connected to the series power terminals, and the gates are controlled by logic and phase timers. FETs are turned off at the end of a phase, while a small amount of power sufficient to operate the control and circuitry is diverted to a power storage circuit, then the FETs are turned back without substantial interruption to the load. A preferred embodiment uses a bi-directional charge pump to transfer power between low- and high-voltage power storage circuits. The circuit can operate with symmetrical or nonsymetrical AC or DC loads.

Claims25

Dependent claims

A power stealing circuit for controlling the current in a power supply line to a load in response to the cycling output of an environmental control and providing operating power for the environmental control, comprising:

first and second terminals for connection in series with the load;
first and second transistors, each transistor having a source, a gate, and a drain, the drain of the first transistor connected to the first terminal, the drain of the second transistor connected to the second terminal, the source of the first transistor connected to the source of the second transistor;
switching logic operatively connected to control the switching of the first and second transistors in low impedance on states in which current is permitted to flow to the load and high impedance off states in which current is substantially blocked from the load, in response to the cycling output of the environmental control, and further operative to independently control the switching of the first and second transistors during the on states for power stealing;
a power storage circuit for providing operating power for the environmental control and connected to receive current diverted from the load when a transistor is in its off state;
a voltage sense coupled to the power storage circuit and operative to signal the switching logic when the voltage in the power storage circuit reaches a predetermined level;
the switching logic including timing control operative at intervals to switch a transistor off to thereby cause the transistor to enter its high impedance state to temporarily divert current to the power storage circuit, and the switching logic operative to switch the transistor on when the voltage sense indicates that the predetermined level has been reached.

3 more elements

A power stealing circuit for diverting power from a load to provide operating voltage for a cycling environmental control for the load, comprising:

a pair of terminals for series connection to the load;
a pair of transistors connected to the terminals and to each other for providing a high or low impedance path through to the load depending on switching signals applied to their gates;
switching logic for controlling the transistors in response to load cycling commands of the environmental control and in response to the need for stolen operating power;
a low voltage supply for supplying operating voltage to the environmental control;
a high voltage supply for supplying operating voltage high enough for control of the gates of the transistors;
a first diversion path operative to deliver power to the high voltage supply when the load is cycled off;
a second diversion path operative in conjunction with the switching logic to deliver power to the low voltage supply when the load is cycled on by periodically momentarily holding power transistors off until sufficient power has been thus diverted to supply the low voltage needs;
and
a bidirectional charge pump operatively connected to transfer power from the high voltage supply to the low voltage supply during the off cycle of the load and from the low voltage supply to the high voltage supply during the on cycle.

6 more elements

first and second terminals for connection in series with the load;
first and second transistors, each transistor having a source, a gate, and a drain, the drain of the first transistor connected to the first terminal, the drain of the second transistor connected to the second terminal, the source of the first transistor connected to the source of the second transistor;
a first phase timer having an output indicating an expiration of a period defined by the first phase timer;
a second phase timer having an output indicating an expiration of a period defined by the second phase timer;
switching logic operatively connected to control the switching of the first and second transistors in low impedance on states in which current is permitted to flow to the load and high impedance off states in which current is substantially blocked from the load;
the switching logic operative in response to a off cycle command by the environment control to switch the transistors to their off states to deactivate the load;
the switching logic operative in response to a on cycle command by the environment control to switch the transistors to their on state and to periodically and temporarily switch the first and second transistors off in response to the expiration of the periods of the first and second phase timers, respectively;
a power storage circuit for providing operating power for the environmental control and connected to receive current diverted from the load when a transistor is in its off state;
and
a voltage sense coupled to the power storage circuit and to signal the switching logic to turn back on a transistor which had been turned off when the voltage in the power storage circuit reaches a predetermined level.

7 more elements

first and second terminals for connection in series with the load;
first and second transistors, each transistor having a source, a gate, and a drain, the drain of the first transistor connected to the first terminal, the drain of the second transistor connected to the second terminal, the source of the first transistor connected to the source of the second transistor;
a least one phase timer having an output indicating an expiration of a period defined by the phase timer;
switching logic operatively connected to control the switching of the first and second transistors in low impedance on states in which current is permitted to flow to the load and high impedance off states in which current is substantially blocked from the load;
the switching logic operative in response to a off cycle command by the environment control to switch the transistors to their off states to deactivate the load;
the switching logic operative in response to a on cycle command by the environment control to switch the transistors to their on state and to periodically and temporarily switch the first and second transistors off in response to the expiration of periods of the phase timers, respectively;
a power storage circuit for providing operating power for the environmental control and connected to receive current diverted from the load when a transistor is in its off state;
and
a voltage sense coupled to the power storage circuit and to signal the switching logic to turn back on a transistor which had been turned off when the voltage in the power storage circuit reaches a predetermined level.

6 more elements

Dependencies are inferred from the claim text.