Back to results
US 5,892,287 AGranted
Semiconductor device including stacked chips having metal patterned on circuit surface and on edge side of chip
AssigneeTexas Instruments Incorporated
InventorsEmily Ellen Hoffman, Judith Sultenfuss Archer
Life of this patent
Estimating the term…
Abstract
A three-dimensional semiconductor circuit assembly wherein each of several circuit chips is provided with patterned metal layers that extend from the circuit surface onto an edge side of the chip, then the chips are adhesively bonded to opposite surfaces of one or more dielectric spacers, respectively, whereby the edge sides of the resulting multiple-chip stack are readily connected to metal patterns on a substrate.
Claims7
A three dimensional circuit assembly comprising:
- first and second circuit chips having a plurality of thin metal layers patterned on the circuit surface and extended onto an edge side of the chip;
- and
- a dielectric spacer having first and second adhesive films on opposite surfaces thereof respectively;
- said spacer having a first surface adhesively bonded to at least a portion of said first chip;
- the second adhesive surface of said spacer adhesively bonded to said second semiconductor chip.
2 more elements
A three-dimensional circuit assembly comprising:
- first and second semiconductor circuit chips having a plurality of thin metal layers patterned on the circuit surface and extended onto an edge side of the chip;
- a dielectric spacer having first and second adhesive films on opposite surfaces thereof respectively;
- said spacer having a first surface adhesively bonded to at least a portion of said first chip
- the second surface of said spacer adhesively bonded to said second semiconductor ship;
- and
- an interconnect substrate having a plurality of conducting patterns thereon electrically connected with the edge sides of said first and second semiconductor chips.
3 more elements
Dependencies are inferred from the claim text.