A method for forming within an integrated circuit microelectronics fabrication a via through a dielectric layer formed of a material susceptible to sequential etching employing a fluorine containing plasma etch method followed by an oxygen containing plasma etch method comprising:
- providing a semiconductor substrate;
- forming over the semiconductor substrate a dielectric layer formed of a material susceptible to sequential etching employing a fluorine containing plasma etch method followed by an oxygen containing plasma etch method;
- forming upon the dielectric layer a patterned photoresist layer;
- etching through use of the fluorine containing plasma etch method while employing the patterned photoresist layer as a photoresist etch mask layer the dielectric layer to form a patterned dielectric layer having a via formed through the patterned dielectric layer, the fluorine containing plasma etch method employing a fluorine containing etchant gas composition which simultaneously forms a fluorocarbon polymer residue layer upon a sidewall of the via;
- stripping through use of the oxygen containing plasma etch method the patterned photoresist layer from the patterned dielectric layer while leaving remaining a no greater than partially etched fluorocarbon polymer residue layer upon the sidewall of the via, where the no greater than partially etched fluorocarbon polymer residue layer inhibits lateral etching of the patterned dielectric layer;
- and
- stripping through use of a wet chemical stripping method the no greater than partially etched fluorocarbon polymer residue layer from the sidewall of the via.