Single chip network adapter apparatus

A host system connected to a network, comprising in combination:

• a host processor;
• a host system bus coupled to the host processor for transferring digital data to and from the host processor;
• host random access memory coupled to the host system bus for storing digital data;
• and
• a network adapter apparatus constructed on a single semiconductor substrate having a first port coupled to the host system bus and having a second port coupled to a network, the apparatus including a host bus interface circuit coupled to the first port, a direct memory access controller circuit coupled to the host bus interface circuit for transferring digital data to and from the host random access memory, a microprocessing unit coupled to the host bus interface circuit, random access memory RAM for storing information in a network protocol format and in a host computer format, said RAM coupled to the microprocessing unit, a network interface circuit coupled to the second port and coupled to the microprocessing unit, the microprocessing unit being operative to format digital data received from the host system bus into packets of data consistent with a network protocol and to format digital data received via the second port into packets of data consistent with a network protocol suitable for the host system bus.

A single chip network adapter apparatus on a single semiconductor substrate, comprising:

• a PMD circuit for interconnection to an ATM network;
• a TC/Framer circuit coupled to the PMD circuit;
• an ATM SAR circuit coupled to the PMD circuit;
• microprocessor means coupled to the ATM SAR circuit for converting ATM packets of data to an internal data format;
• an internal data bus coupled to said microprocessor means for converting ATM packets of data;
• a direct memory access controller coupled to the internal data bus;
• and
• a PCI bus interface circuit coupled to the direct memory access controller, and being adapted for connection to an external data bus, whereby data in the internal data format can be transferred to and from an external bus;
• each of the components of the single chip network adapter apparatus being disposed on a single semiconductor substrate.

A single chip network adapter apparatus on a single semiconductor substrate, comprising;

• a physical layer circuit for interfacing to an ATM network;
• an ATM cell interface circuit coupled to the physical layer circuit;
• a virtual channel RAM (VCR) coupled to the ATM cell interface;
• a DMA-VCR bus coupled to the virtual channel RAM;
• a direct memory access controller coupled to the DMA-VCR bus;
• a random access memory for storing packets of data in an ATM network protocol format, the random access memory being coupled to the direct memory access controller;
• an internal data bus coupled to the direct memory access controller;
• an ATM microprocessing unit (APU) for converting data in an ATM network protocol format to an internal data format, said APU being coupled to the internal data bus;
• a host data bus coupled to the direct memory access controller;
• a shared host RAM memory coupled to the host data bus for storing data in the internal data format;
• and
• a host processor coupled to the host data bus;
• each of the components of the single chip network adapter apparatus being disposed on a single semiconductor substrate.

A single chip network adapter apparatus on a single semiconductor substrate, comprising:

• means for interconnecting to an ATM network;
• a random access memory for storing ATM cells;
• means for processing and segmentation and reassembly, said means being coupled to the means for interconnecting to an ATM network;
• a microprocessor for converting ATM cells to an internal data format, said microprocessor being coupled to the means for storing ATM cells;
• an internal data bus coupled to said means for converting ATM packets of data;
• a direct memory access means coupled to the internal data bus for controlling transfers of information to and from said random access memory;
• and
• external bus interface means for connection to an external data bus, said means being coupled to the direct memory access means;
• each of the components of the single chip network adapter apparatus being disposed on a single semiconductor substrate.